[SI-LIST] flex circuit & chip scale basics

Hello all,
 

I'm interested in two main items regarding present understanding of modeling
issues and actual DUT's SI performance (specific to flex/chip scale attach):

 

1.      flex circuit (miniature, for chip scale interconn.)

2.      chip scale SI 

 

Just the major issues are of interest, but detail is welcome.  

 

Possible issue examples:

1.      favored model generation approach for flex Tlines & attachment (ie:
ADS vs. 3D solvers)
2.      xtalk factor due to small geometries in flex
3.      Impedance control 
4.      Z changes vs. length due to materials properties, or other mech./SI
interaction 

 

Regards

hreidmarkailen

 



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