[SI-LIST] Re: diff pair signal

Hi,

I thought differeential is not the same as
complementry.

the signal swings that input buffer sees are
different.

Thanks

Yafei
--- "Brown, Mike (Austin, TX)" <mibrown@xxxxxx> wrote:
> In many board geometries, the coupling between
> "differential pairs"
> approaches zero.  You are really dealing with two
> single-ended signals
> that happen to be complements of each other. It is
> possible to use one
> side of such a "differential pair" as a single-ended
> signal source.
> Assuming, for the moment, that you don't care about
> common-mode noise
> rejection at the receiver, and that you can generate
> a reference voltage
> that does not introduce too much duty-cycle
> distortion in the recovered
> signal.  It's generally not a good practice, IMO.
> 
> Mike
> 
> 
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Aubrey_Sparkman@xxxxxxxx
> Sent: Wednesday, June 30, 2004 10:26 AM
> To: weirsp@xxxxxxxxxx; gopalak@xxxxxxxxxxx;
> si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: diff pair signal=20
> 
> 
> I don't know of an actual instance where anyone has
> done this...
> 
> BUT, for "other logical interfaces", one might
> attach a single ended
> sampler or detection circuit off one side IF (and
> big IF) acceptably
> isolated with high impedance resistor or whatever. 
> Of course, SI work
> would need to be done to insure the loading would be
> acceptable to the
> diff pair interface.
> 
> Aubrey Sparkman=3D20
> Enterprise Engineering Signal Integrity Team
> Dell, Inc.=3D20
> Aubrey_Sparkman@xxxxxxxx=3D20
> (512) 723-3592
> 
> 
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of steve weir
> Sent: Wednesday, June 30, 2004 10:12 AM
> To: gopalak@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: diff pair signal=3D20
> 
> 
> In such a situation where do you think the diff
> amplifier will obtain
> its=3D20 reference?
> 
> At 07:38 PM 6/30/2004 +0530, Gopalakrishnan Sethuraj
> wrote:
> >Hello
> >
> >
> >Is there any scenario where one (positive)  of the 
> differential=20
> >pair=3D20 signal output  will be connected to
> single pin in LVDS or =
> other
> 
> >logical
> 
> >interfaces ?
> >
> >
> >
> >
> >
> >Thanks&Regards
> >
> >Gopalakrishnan
> >
> >
> >
> >
>
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