[SI-LIST] Re: diff pair signal
- From: steve weir <weirsp@xxxxxxxxxx>
- To: "Gil Gafni" <gil.gafni@xxxxxxxx>, <gopalak@xxxxxxxxxxx>,<si-list@xxxxxxxxxxxxx>
- Date: Wed, 30 Jun 2004 10:00:23 -0700
Gil, by using two outputs, you get the same effect, only translated back
into the I/O ring where the real driver potential is. When you use Vddq /
Ground from outside the package the package filtering alters your derived
reference from what is really happening in the chip. For a 6:1 supply
versus signal swing, 16% noise difference consumes the entire swing.
Regards,
Steve.
At 09:44 AM 6/30/2004 -0700, Gil Gafni wrote:
>We have followed this recommendation for SSTL which is a low swing as
>well.
>The idea that stands behind it, is that if for any reason (i.e. noise)
>the driver's Vddq droops/bounces, it will affect the common mode of it's
>output swing.
>By allowing the Vref of the receiver to follow those changes
>(droop/bounce) the common mode of the receiver will follow the common
>mode of the transmitted signal.
>
>It sounds that what you suggest will work as well, I reckon once one
>decides to "cheat" and not follow the standard, as long as he follows
>the "spirit" of it he will be ok.
>
>Thank you for your remarks and for your suggestion, I will definitely
>will consider it in our next design
>
>
>Cheers,
>
>
>
>Gil Gafni
>
>
>
>
>-----Original Message-----
>From: steve weir [mailto:weirsp@xxxxxxxxxx]
>Sent: Wednesday, June 30, 2004 9:39 AM
>To: Gil Gafni; gopalak@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Re: diff pair signal
>
>
>Gil, with LVDS I think that would be a very bad idea. LVDS is low swing
>
>and the swing references the internal power / ground nodes. If someone
>were going to try and cheat to reduce interconnects, I would take a
>single
>LVDS pair and hold it at a static level. Then use a 1:1 resistor
>divider
>between the two output leads as the reference for the single-ended
>"LVDS"
>signals.
>
>Regards,
>
>
>Steve.
>At 09:26 AM 6/30/2004 -0700, Gil Gafni wrote:
> >I would say that you want to take the transmitter's Vddq (IO voltage)
> >and generate the reference from it. This will allow the receiver's
> >input to follow any changes in the transmitter's rails.
> >
> >Cheers,
> >
> >
> >
> >Gil Gafni
> >
> >
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx
> >[mailto:si-list-bounce@xxxxxxxxxxxxx]
> >On Behalf Of steve weir
> >Sent: Wednesday, June 30, 2004 8:12 AM
> >To: gopalak@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> >Subject: [SI-LIST] Re: diff pair signal
> >
> >
> >In such a situation where do you think the diff amplifier will obtain
> >its reference?
> >
> >At 07:38 PM 6/30/2004 +0530, Gopalakrishnan Sethuraj wrote:
> > >Hello
> > >
> > >
> > >Is there any scenario where one (positive) of the differential pair
>
> > >signal output will be connected to single pin in LVDS or other
> > >logical
> >
> > >interfaces ?
> > >
> > >
> > >
> > >
> > >
> > >Thanks&Regards
> > >
> > >Gopalakrishnan
> > >
> > >
> > >
> > >
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- References:
- [SI-LIST] Re: diff pair signal
- From: steve weir
- [SI-LIST] Re: diff pair signal
- From: Gil Gafni
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- From: steve weir
- [SI-LIST] Re: diff pair signal
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