[SI-LIST] Re: diff pair signal
- From: steve weir <weirsp@xxxxxxxxxx>
- To: gil.gafni@xxxxxxxx, <gopalak@xxxxxxxxxxx>,<si-list@xxxxxxxxxxxxx>
- Date: Wed, 30 Jun 2004 09:53:25 -0700
Gil, I don't know of any specific problems with leaving one leg of an LVDS
driver open but it might cause some timing issues as the current source
goes from unloaded to loaded. We disagree on how best to get a reliable
switching reference as noted in earlier postings. Given the low swing of
LVDS, if it is a poor man's translator, AC coupling would seem mandatory
due to the low swing.
Regards,
Steve.
At 09:35 AM 6/30/2004 -0700, Gil Gafni wrote:
>To my humble opinion, it is all about the transmitter (driver).
>
>If it a true current logic, like the LVDS and alike, you have to close
>the current loop, otherwise it will not work properly (or at all)...
>If you driver is build of two "independent" drivers it will be easier.
>In such case you can connect one output to the receiver.
>You will have to address few issue though:
>1. What should you do with the other output, i.e. can you leave it open
>or is would you need any termination
>2. assuming that the receiver is not a single ended, you will have to
>address the Vref, I would recommend to generate it from the driver's
>Vddq (IO voltage)
>3. Do you need to AC couple
>
>And so on
>
>By the way there are plenty of Application Notes that discuss single to
>diff, to name one -
>http://www.saronix.com/pdf/applications/AN047.pdf
>
>Good luck
>
>
>Cheers,
>
>
>
>Gil Gafni
>
>
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>On Behalf Of Gopalakrishnan Sethuraj
>Sent: Wednesday, June 30, 2004 7:09 AM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] diff pair signal
>
>
>Hello
>
>
>Is there any scenario where one (positive) of the differential pair
>signal output will be connected to single pin in LVDS or other logical
>interfaces ?
>
>
>
>
>
>Thanks&Regards
>
>Gopalakrishnan
>
>
>
>
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