[SI-LIST] dendrites / edge relief

From: k EPD <epd2001usa@xxxxxxxxxxx>
To: si reflector <si-list@xxxxxxxxxxxxx>
Date: Thu, 24 Jul 2008 21:44:49 -0400

Anyone have any standards for PCB layout regarding keeping voltage planes/gnd 
planes away from the edge of the board?

Keith Kowal
978-659-7836 (w)
www.marbleheadvideo.com
 
 
_________________________________________________________________
Use video conversation to talk face-to-face with Windows Live Messenger.
http://www.windowslive.com/messenger/connect_your_way.html?ocid=TXT_TAGLM_WL_Refresh_messenger_video_072008
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field


List technical documents are available at:
                http://www.si-list.net

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu

Follow-Ups:

[SI-LIST] 回复:dendrites / edge relief
From: zhangkun 29902

[SI-LIST] dendrites / edge relief

Other related posts: