[SI-LIST] ddr2 75ohms option

Hi, 
This is w.r.to the document titled,
"TN-47-19: DDR2 (Point-to-Point) Features and Functionality" from Micron.
I have a small doubt in the concept explained in the 
"Figure 3: DDR2 READs and WRITEs Using ODT (DDR2-667 speed)". 

Here the controller ODT is enabled for 75ohms during reads. I want to know with 
the reduced drive option of controller (35~40ohms) how this 75ohms (ODT) can 
terminate effectively 50ohm Transmission Line of traces.

P.S : 
I tried posting in micron website, but the server is down / some problem in 
accepting queries. So I am trying here. Nevertheless, this may be helpful to 
someone in the near future.
 
Thanks,
Canes


       
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