[SI-LIST] Re: current return-path for differential pair on PCB

Doug, at Gbps bit rates there isn't anywhere near enough time for the 
flux to significantly spread out.  At 1.0Gbps the penetration of copper 
in any direction during one bit interval is on the order of a micron.  
For even long run lengths the flux remains tightly confined between each 
trace and the nearest plane in all axes.  For the flux to spread 
laterally in the plane on the scale of  typical differential line to 
line spacing takes hundreds of microseconds. 

But for the common mode rejection of the receiver, differential links 
would not tolerate channel discontinuities any better than two arbitrary 
single-ended lines.  A problem that has frustrated and mystified many 
engineers happens when the receiver runs out of common mode range due to 
excessive aggressor coupling associated with a channel discontinuity.  
This results in soft data errors that can be very unpleasant.  Life is 
much simpler when we don't test the receiver CMR by introducing 
discontinuities.  If a discontinuity is unavoidable, the impact should 
be evaluated. 

If you want to look at the problem with a full 3D solver, you can take 
Simbeor, www.simberian.com, out for a free 30 day spin.

Steve.

Doug Brooks wrote:
> I have always believed the current flows BOTH on the continuous, 
> relevant, closely spaced plane underneath the traces and also on the 
> traces themselves.
>
> Consider the transition time between states --- the rise and fall 
> times are typically fast and the current couples to the planes.
> During the (short) time the signals have stabilized at their 
> respective levels, the coupling dies out and the current flows around 
> the trace-pair.
>
> This is why we follow the design rule that differential traces are 
> routed close to continuous, relevant planes AND ALSO close to each other.
>
> You will hear other opinions on this forum!!
>
> Doug Brooks
> UltraCAD Design, Inc
> http://www.ultracad.com
>
>
>
> At 03:40 AM 11/29/2008, Istvan Nagy wrote:
>   
>> hi
>> for a differential pair, like PCIe or SATA, some people (some of my 
>> colleagues) say, its not needed to have a continous good current 
>> return path since the differential voltage is referenced only to the 
>> other signal-trace in the pair.
>>
>> I think the current return path has to be continous even for 
>> diffpairs, because:
>> 1.) Common mode noise:
>> if the return path is not continous, then it creates loops for the 
>> common mode noise, so the common mode noise will be bigger. If the 
>> CM noise is bigger than it introduces jitter into the differential 
>> signal. which is bad.
>> 2.) Impedance:
>> if the return path is poor, the the return current has to flow 
>> around to get a path between the source and destination, so on some 
>> areas the return current doesnt flow unterneath the signal traces so 
>> basically their single-ended (odd mode) impedances (so the diff 
>> impedance too) will be different than its calculated in the 
>> imp.calculator (polar, or MMTL), which assumes a perfect ground plane.
>>
>> am i right, or wrong? why?
>>
>> Istvan Nagy
>> Concurrent Technologies plc, UK.
>>
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