[SI-LIST] Re: current flow on a pwr plane

Jim

I have been been working on an simulator to do these calculations (
http//idc2d.sourceforge.net ) for the reasons you mentioned.  It should be
fairly accurate though it's still in it's intial stages.

So far I have modelled vias connected to a single ideal voltage source (and
sink)  This exaggerates the current densities of the nearest source and sink
points.  As well, there would be local thermal effects not yet accounted for
which would further balance out the current between the vias. 

Note that the development version 0.2.3, a contributor made an error in the
density function so its results are not accurate.  The other versions seem
okay based on two measurements.  It works with bitmaps, so it's fairly easy
to experiment with.



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Peterson, James F (EHCOE)
Sent: January-10-08 2:05 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] current flow on a pwr plane

I've been looking at some simulators that predict DC current flow
through a power plane...They can be used to evaluate the ability of a
copper pour to support the DC current needs between a POL regulator and
it's "consumer" (maybe the core voltage of a processor or ASIC). This is
becoming important because of the "swiss cheese" effect under these
components and the huge DC currents that they need. 
Anyway, on to my question : the results of these simulations often show
current densities that are not intuitive to me. For example, 4 vias
connecting 2 pwr planes together, they are somewhat close to each other
(say, within an inch), yet the current densities through these 4 vias
are very different.

Is there a white paper or someone out there that can explain this
behavior? I'm not looking for a complex equation, more like an
explanation that makes it more intuitive.

Thank,
Jim Peterson
Honeywell

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