[SI-LIST] Re: cpu socket
- From: "Todd Westerhoff" <twester@xxxxxxxxxxx>
- To: <Stanley.Chiu@xxxxxxxxxx>,"Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 12 Dec 2001 09:55:25 -0500
Stanley,
SPECCTRAQuest considers everything up from the board etch to be part of the
device model (i.e. the IBIS device). If you want to model socket
parasitics, you have two options:
a) Edit the IBIS model for the processor and add the socket parasitics to it
b) Treat the socket as a board unto itself, that connects the processor to
the mainboard. SPECCTRAQuest calls these types of linkages "Design Links"
Although I'm using the name SPECCTRAQuest and SPECCTRAQuest terminology
here, the problem is generic - I believe the solution approaches would be
the same no matter which PCB-level SI tool you use.
Personally, I would start with approach "a" and only switch to "b" if I had
some reason to believe accuracy was being affected. Setting up multi-board
system analyses is a lot easier than it used to be, but it's still something
that I only use when needed.
Todd.
Todd Westerhoff
SI Engineer - Hammerhead Networks
5 Federal Street - Billerica, MA - 01821
email:twester@xxxxxxxxxxx - ph: 978-671-5084
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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Stanley.Chiu (ªô««²M)
Sent: Wednesday, December 12, 2001 8:07 AM
To: Si-List (E-mail)
Subject: [SI-LIST] cpu socket
dear sirs;
anyone who familiar with cadence spectraquest simulation tool could give
me a tip how to make a combinaton between cpu and cpu socket and doing
simulation?? here is my question.. since spectraquest extract the netlist
form *.brd file, the *.brd netlist come from schmatic file, in schematic
file there's only one component ( ex; u1)stands for cpu , how do I assign
model for cpu in simulation since actually u1 including socket and cpu
itself, any good modeling strategy for solving this kind of problem ??
any input will be appreciated!!
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