Hi all:
This questions comes from yesterday's topic "DDR2 Trace Length Margin"
which Jeff, Brian,Tom and many experts give very wonderful explains. Maybe the
main problem is whether to follow the very tight specs , length mathch is one
aspect,and the overshoot is another one which is often more trouble to deal.
For example , a chip which contains 667Mbps DDR2 and 33MHz PCI interfaces
,the datasheet said that all the overshoot on the digital interface should less
than +/-0.7V,in despite of
the frequency,overshoot time ,would you follow this spec? How do you thinks
about this?
Regards,
LIU Luping
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