[SI-LIST] Re: Wirebond models for on-chip PDN characterization

Allan,
Arrange die pads and package pins so that you reduce the loop inductance on 
your measurement path (minimize loop area of the current flow in your 
measurement path; you will need to figure out the path of the return current).  
You have also series resistance on the path and additional capacitance on ESD 
diodes (sometimes with additional series resistance) that you will need to 
place on the on-die pin to comply with the fab manufacturing requirements.  The 
overall bandwidth will degrade so I suggest you build a model of the entire 
measurement path and simulate it.  If you have access to my book "Noise 
Coupling in Integrated Circuits" I have covered some aspects of on-die probing 
including an on-die active probe that generates shmoo-plots of periodic 
waveforms, which I assume you will generate based on your stimulus 
description.  On-die shmoo-plots can have higher bandwidth since they now 
transmit digital data outside the die.  If you have
 enough time before tape-out you may consider adding multiple (redundant) 
measurement techniques for supply, ground, and/or substrate noise. 
Cosmin
 
Cosmin Iorga, Ph.D.
NoiseCoupling.com
http://www.noisecoupling.com
tel: (805)231-9786
 
________________________________
From: Allan Wang <allanvv@xxxxxxxxx>
To: si-list@xxxxxxxxxxxxx 
Sent: Tuesday, February 7, 2012 10:26 AM
Subject: [SI-LIST] Re: Wirebond models for on-chip PDN characterization

Sorry, I accidentally hit the send button and the message seems to have
gone through, now that I'm getting all the out-of-office spam... despite me
getting an error about my email address being unregistered.
Anyway, my main question was about monitoring my VDD's through the wirebond
pad. I'd like to see high frequency VDD fluctuations. I believe a standard
wirebond of 1nH and an active differential probe loading of 1pF should be
OK for up to 1 GHz, is this correct?

Should I arrange the pads like: GND1 VDD1 GND2 VDD2 GND3 VDD3 where the
grounds aren't necesarily the substrate grounds, or should I put substrate
grounds inbetween each "signal".

Allan

On Mon, Feb 6, 2012 at 5:38 PM, Allan Wang <allanw@xxxxxxx> wrote:

> Hi all,
>
> I'm a student researching a different topology for an on-chip PDN. To
> test, we are able to get a very small (1mm x 1mm) 45nm test chip sent out
> for fabrication in the next couple of months. The chip will have wirebonds.
> I'd like to know if anyone has some pointers or papers on designing such a
> test chip. I've already read this 2010 Altera paper [1] which seems to
> cover most of it.
>
> I have a few questions about the design:
>
> 1)
>
> I'm planning on having:
>
> 1) Ring-oscillator VCO for generating a clock signal to feed into a bank
> of inverters for load simulation. (or should I use T flip-flops like the
> Altera paper?)
>
> I'd appreciate any advice you guys can give me. Thanks.
>
> Allan Wang
> Carnegie Mellon University
>
> [1] http://www.altera.com/literature/cp/cp-01060-pdn-noise.pdf
>


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field


List technical documents are available at:
                http://www.si-list.net

List archives are viewable at:    
        http://www.freelists.org/archives/si-list

Old (prior to June 6, 2001) list archives are viewable at:
        http://www.qsl.net/wb6tpu
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field


List technical documents are available at:
                http://www.si-list.net

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
 
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu

Other related posts: