Hi, Iain, I can't agree more with Steve and Lance that you can never assume simulation<-> measurement correlation or take it for granted. The correlation step is critical in high speed designs such as DDR. Without achieve correlation, one would not have confidence to trust the simulation for a vast range of what -if optimizations that are impractical to achieve by prototyping build in the tight development schedule. Obviously mis-match between simulation and measurement can be caused by either side: 1. On the simulation side culprits include: - fidelity of model ( for both DRAM controller and memory), make sure you use model reflecting the representative die-rev, if necessary, validate the model by building test boards with simple Txline fixture first - decision/trade-offs in extracting model for features on prototype boards, ex: is it an acceptable trade-off to rely on 2D or 2.5D model for via in your interested frequency range? How accurate if the PCB or components ( if any ) parameter extracted at that frequency - does the design suffers xtalk/SSN/PDN and are those factors been taken into account ? 2. On the measurement side: - As Steve pointed out, BW of equipment if a critical factor. I have seen some -400 DDR2 with rise/fall time in 100 ps range, so 6 GHz probe may be barely adequate - probe attachment on test boards. You may want to consider whether the attach fixture need to be accounted for in your modeling In you specific case, if you have a good match between simulation and measurement at driver's side but not at receiver side, I'd start look for accuracy of receiver model, as well as accuracy of PCB feature model between driver and receiver. Hope this helps ! Have an enjoyable week-end ! Catherine Xu __________________________________ Lead HW Design Engineer, Ph.D HP ICS CHIL - San Diego __________________________________ -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Lance Wang Sent: Friday, August 27, 2010 7:32 AM To: 'Iain Waugh' Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: What do you do when the manufacturer's model doesn't match the measurements? Steve has very good comments about measurement correlations with simulations. For models self (not only IBIS models), many models are out there without correlations/validations (sad to say that many IBIS models are). I think this is one reason why you would like to correlate by yourself before trust them for the simulations. You can ask the vendor to see if they have validated models in some ways. Some vendors have the validation report handy but you will have to ask. These reports will give you some info about validation results and test load settings. It could help you to figure out if you have mistakes with your measurement settings too. Hope this helps, Lance Wang IO Methodology Inc. SIMDE - The most complete IBIS modeling and validation tool. www.iometh.com/Product/SIMDE -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of steve weir Sent: Friday, August 27, 2010 9:34 AM To: Iain Waugh Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: What do you do when the manufacturer's model doesn't match the measurements? No, you should never make assumptions about correlation that you haven't verified. For sanity check you should set-up probes in the simulation that match the PCB, and then compare the results. Ideally the probes you set-up will be located such that they are meaningful with respect to what the die sees, which is what you really care about. There are many ways to go wrong in each the simulation and measurement. In your case, I think your scope probe bandwidth is woefully inadequate. For DDR2, 2GHz is about the absolute minimum floor I would consider measuring and then with substantial adjustment for the limited bandwidth. 5GHz scope plus probe bandwidth would be a lot preferable. You need to really understand the parasitics in your probing. Hopefully, you included that in your modeling. Finally, you want to be sure that your scope measurements don't suffer DSP spongiform encephalopathy. Steve. Iain Waugh wrote: > Hi all, please can you advise! > > Our aim is to prove the vendors' IBIS models on a dev board so we can have confidence that simulations of our own 400MHz DDR2 design (using the same parts) will be accurate. We're simulating with Hyperlynx 8.0 and have taken the most up-to-date IBIS models from the vendors' websites. > > We've made a pretty good free-form schematic model of the dev board with the target CPU and memories (plus 'scope probe at the receiver's pin). The initial simulations were horrible with a massively non-monotonic rising edge crossing the Vil and Vih levels of the receiver twice. We used a 6GHz LeCroy 'scope with 1GHz probes to measure the actual dev board's signal integrity and the edges were clean. > > In my mind, that proves that I can't trust the model. The catch, however, is that the vendor then told us to put the simulation probes at the die instead of at the pin. We re-simulated and the non-monotonic edges went away - they actually looked like the measurement! > > Would you trust the results of a simulation when the measured case only correlates with a simulation having probes in a different place? Can we use the wrong (but matching) model to guide us to the best routing topology? I'm tempted to just use standard good SI practises and ignore the simulations. > > Best regards, > > Iain Waugh > > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > > or to administer your membership from a web page, go to: > //www.freelists.org/webpage/si-list > > For help: > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > > > List technical documents are available at: > http://www.si-list.net > > List archives are viewable at: > //www.freelists.org/archives/si-list > > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > > > > -- Steve Weir IPBLOX, LLC 150 N. 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