[SI-LIST] What do you do when the manufacturer's model doesn't match the measurements?
- From: Iain Waugh <iwaugh_pub@xxxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 27 Aug 2010 23:00:02 +1000
Hi all, please can you advise!
Our aim is to prove the vendors' IBIS models on a dev board so we can have
confidence that simulations of our own 400MHz DDR2 design (using the same
parts) will be accurate. We're simulating with Hyperlynx 8.0 and have taken
the most up-to-date IBIS models from the vendors' websites.
We've made a pretty good free-form schematic model of the dev board with the
target CPU and memories (plus 'scope probe at the receiver's pin). The initial
simulations were horrible with a massively non-monotonic rising edge crossing
the Vil and Vih levels of the receiver twice. We used a 6GHz LeCroy 'scope
with 1GHz probes to measure the actual dev board's signal integrity and the
edges were clean.
In my mind, that proves that I can't trust the model. The catch, however, is
that the vendor then told us to put the simulation probes at the die instead of
at the pin. We re-simulated and the non-monotonic edges went away - they
actually looked like the measurement!
Would you trust the results of a simulation when the measured case only
correlates with a simulation having probes in a different place? Can we use
the wrong (but matching) model to guide us to the best routing topology? I'm
tempted to just use standard good SI practises and ignore the simulations.
Best regards,
Iain Waugh
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