[SI-LIST] Via modeling shows strange behavior
- From: Ravinder.Ajmani@xxxxxxxxxxxxxx
- To: <si-list@xxxxxxxxxxxxx>
- Date: Wed, 29 Feb 2012 09:19:21 -0800
Hi Experts,
I am doing via modeling using Cadence PCB SI GXL. I have a 6-layer
stackup, and via is connecting the interconnect from Top layer to Layer 3,
with Layer 2 as Ground. I modeled the via with a single Ground via placed
at the closest distance the tool will allow, and then modeled the same via
without the Ground via. The Insertion Loss and the Return Loss for the
Single via are about 15 - 20% better then the Ground coupled via. I am
puzzled with the results. I will appreciate if you can help me understand
the reason for this.
Thanks.
Regards,
Ravinder Ajmani
Server PCB Development
Hitachi Global Storage Technologies
Email: Ravinder.Ajmani@xxxxxxxxxxxxxx
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