[SI-LIST] Re: Via model

Dorin,

Both the PI and T equivalent circuits of vias are just approximations, 
therefore they should be used only in cases when the signal edge 
passing through the model is significantly longer than the delay of the 
model, which is sqrt(L*C); in that case the two models should give 
very closely the same waveforms.  

If your application calls for fast 
edges, where this condition cannot be met, a more detailed via 
model is needed.  In the most generic case, where you have 1...N 
metal layers in the PCB, and the trace transitions from layer A to 
layer B, you may need a PI circuit formed of three transmission lines.  
All three transmission lines can be low loss or loss less.  Two 
open-ended transmission lines replace the capacitors in your present 
PI circuit, and the third line connects the two shunt lines and replaces 
L in your PI circuit.  By adjusting the Zo and tpd values of all three 
transmission lines independently, you can capture the via stub 
resonances separately on top and bottom, include pad capacitances,
 as well as the delay and capacitive or inductive nature of the portion 
of the via barrel between layers X and Y.

Regards,

Istvan Novak
SUN Microsystems


----- Original Message ----- 
From: "Dorin" <dorin.oprea@xxxxxxxxxxx>
To: "si-list" <si-list@xxxxxxxxxxxxx>
Sent: Thursday, November 27, 2003 9:06 AM
Subject: [SI-LIST] Via model


> Hi,
> What should be the model for the via:
> a) C/2 to gnd - L - C/2 to gnd or
> b) L/2 - C to gnd - L/2
> The circuit I simulate shows a significant difference between the two
> cases.
> 
> Thanks,
> Dorin
> 
> 
> 
> 
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