[SI-LIST] Validation of XTK results for clock skews




Hello all,

This question is related to validation of clock skews from XTK with practical
clock skews measured on board.
I am interested in the clock skew between the CPU_CLOCK and the CHIPSET_CLOCK.
Practically, the skew has been measured on the CRO at the destination of the
CPU_CLOCK pin and the CHIPSET_CLOCK pin.
From XTK, I have measured the flight time for the CPU_CLOCK (i.e the delay from
the clock syntheziser pin to the CPU_CLOCK pin), and the flight time for the
CHIPSET_CLOCK (i.e, the delay from the clock synthesizer pin to the
CHIPSET_CLOCK pin).
I have calculated the clock skew to be the difference between the
Tflight(CPU_CLOCK) and the Tflight(CHIPSET_CLOCK).
The flight times have been calculated using the typical corner. The simulated
clock skew is nowhere close to the practical skews measured. The simulated clock
skews are from the board file. The skews have also been calculated for the fast
and slow corners.

I would like to know,
a) What are the parameters i need to take into for calculating the simulated
clock skews from XTK?
b) Why is there a large difference between simulated and practical results?
c) How do i measure the clock skew from XTK?
d) Is the procedure i have followed for calculating the clock skew from XTK
correct?

Looking forward to your valued suggestions and help.


Thanks and Regards,
Suchitha



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