[SI-LIST] Re: VHDL-AMS

Hello Girish,

Note that VHDL-AMS is an IEEE Standard (1076.1) Hardware Description Language. 
There are several commercial CAD tools available that can simulate models 
written in VHDL-AMS. 

We provide a free-download course that covers the basics of VHDL-AMS, 
specifically intended for those modeling high-speed buffers and signal 
integrity effects. It includes simulation-based labs that run in our free 
download educational simulator. You can find these at the following link:

http://www.mentor.com/systemvision/high_speed/vhdl_ams.html

Regards,

Mike Donnelly
Systems Analysis Engineer
Mentor Graphics Corporation

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Mohanty, Girish C. (UMR-Student)
Sent: Thursday, November 27, 2003 11:33 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] VHDL-AMS

Dear subscribers:

I am a beginner in VHDL-AMS, and would like to know of anyone who has
experience using this CAD tool.=20

Specifically, I would like to know where to begin with. Any good book or
web resource that anyone would suggest, will be welcome.

I would love to learn VHDL-AMS vis-a-vis PSPICE.=20

Sincerely,
Girish C Mohanty
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