[SI-LIST] Using Load Switching FETs

Hello,

Does anyone have any thoughts on using load switching FETs between a main
power plane
and a local power plane devoted to 1 or 2 ICs?

Some of the PFETs offered these days feature Rds values below .01 ohm and
package para-
sitic inductances of a nH or so. For situations where one has many ICs with
multiple
voltage supplies that have to be sequenced on in a particular order, the
FETs seem very
attractive. I realize that for fast ICs with large dI/dt needs, the
parasitic L could be
a bottle neck. But can this not be compensated for with a properly chosen
array of de-
coupling caps, and would the same issue not exist for point of load
regulator modules?

Any advice would be appreciated.

Thanks,
Jim

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