[SI-LIST] Re: Use of Tenting Phenomena during Solder Masking - NEBS MFG

  • From: David Heald <daveheald@xxxxxxxxxxxx>
  • To: mpillai@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
  • Date: Thu, 10 Jan 2002 10:16:19 -0500

I once heard the opinion that tenting may help with the NEBS MFG test. 
I have personally seen boards come out of this test with highly
blackened vias while most of the other circuitry was apparently
untouched.  Does anyone have experience with tenting the vias as a way
to protect against corrosion in the vias?

Thanks,
Dave Heald

Manu Pillai wrote:
> 
> Basically, if you "tent" your vias, they are covered with solder mask. If
> not ("overide"), they are exposed.
> 
> Some folks tent vias under components to keep from shorting; that's risky.
> Solder mask thickness can vary enough to cause issues. Also tenting could
> mean that debris in a via hole remains unremoved, and unremovable. Exposing
> the via's also get's you contact to the via's; useful when you need a free
> test point:-) I suppose there could be benefits to tenting a via. I haven't
> seen them yet.
> 
> Manu
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Adeel Malik
> Sent: Tuesday, January 08, 2002 5:10 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Use of Tenting Phenomena during Solder Masking
> 
> While routing the boards many PCB design softwares define various properties
> of the PADS which are required by the Fabricators. One of the property is
> whether designer wants a Solder Mask feature for a particular pad with a
> 'Tenting' or 'Override' option during PCB fabrication. Can someone tell me
> whats meant by tenting or override in this regard.
> Thanks,
> Adeel Malik,
> SI engineer,
> Islamabad, Pakistan.
> Tel: 92-051-2826160
> Fax: 92-051-2827469
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