[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

Vishram Pandit wrote:

>I have seen some comments on the SI list that the capacitors are ineffective
>say above 500MHz. Is this really true?? I have seen improvement in EMI at
>600MHz-800MHz if I tune the 
>* value of the capacitors 
>* ESR / ESL of the capacitors 
>* location of the capacitors 
>Any comments/advice will be appreciated. 

I think you will find that discrete decoupling capacitors placed on 
a PCB are largely ineffective at 500 MHz (actually above about 100 MHz
or so) for SI purposes. However, as you have discovered, they can be useful
for dealing with EMI issues up to 500 MHz (and sometimes beyond).

The problem with using decaps for SI purposes above about 100 MHz is
that there is usually enough parasitic inductance in the chip package
(and the package mounting) that any attempt at bypassing on the PCB never 
shows much if any effect at the silicon. Depending on the exact design of
the package and the mounting arrangement (pad design, vias, board thickness,
etc.) the useful frequency for the SI decaps may even be considerably less
than 100 MHz.To provide effective bypassing at the higher frequencies you 
need to consider decaps in the package or on the silicon.

For EMI purposes, you can select decaps that will resonate with their
mounting inductance to provide low impedances at specific problematic
frequencies. You can select physical locations on the board that are
"hot-spots" to place your decaps for maximum effect. The distributed
capacitance provided by the power planes is also very effective in
dealing with EMI issues at high frequencies , but as mentioned above,
being present at the PCB it doesn't do much for SI pds problems on the

There are lots of other things to consider, but these are some of the
main ones.

-Ray Anderson
Sun Microsystems 

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