[SI-LIST] Re: Traces don't cause EMI - really?

  • From: "Salkow, Steven" <steven.salkow@xxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Wed, 22 Oct 2003 17:59:29 -0700

Prove it to your self:
I have used a technique in the lab that will indicate the worst radiated noise 
generators on a PCB. Take your ground lead (usually a four inch length) loop it 
directly to the tip of your 1 meg input oscope probe. Having formed this coil, 
hold it parallel to the board. Walk it around the board two or four inches 
away. All the high DI/DT hash of noisy busses are easily picked out. (You'll 
probably pickup the 120 Hz of the florescent light above you as well.) Try "the 
coil" over your low current diff pairs. If these are routed as microstrip over 
a ground plane that is homogeneous, the radiated fields tend to cancel each 
other and they radiate little.
if these signals are LVDS these are only doing 3 ma, i.e. not high DV/DT.
on the other hand, a high speed bus controller port running at 64 ma per pin 
may be pumping out 20 x that of the 3 ma field.)
A bus consisting of multiple 64 ma node running 32 or 64 pins all in the same 
direction (step response) are additive and the emitted field is now orders of 
magnitude larger that the original LVDS diff pair.
The primary offenders are the first and second harmonic of each fundamental and 
their interactions (products)

Steve Salkow 

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Cheng
Sent: Wednesday, October 22, 2003 5:15 PM
To: 'leeritchey@xxxxxxxxxxxxx'; Chris Cheng; bdewitt@xxxxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Traces don't cause EMI - really?


Lee,
Below is my response. 

-----Original Message-----
From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
Sent: Wednesday, October 22, 2003 1:49 PM
To: Chris Cheng; bdewitt@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Traces don't cause EMI - really?

>It would have been better for me
>to state that I had been involved in a number of disc drive designs that
>had traces on the outer layers and passed EMI without benefit of a Faraday
>cage.  That's not so hard to visualize.

Ok, you use disk drives as an example. Well, all the disk drives I/O I know
got changed into differential signals when the speed get higher
(FCAL,Diff.SCSI, serial ATA). Should I then use it as a counter example to
claim differential signaling is needed to pass EMI using surface traces then
?

>Do I deliberately route all members of diff pairs on different layers?  No.
>Only when it is necessary to escape a connector or part.  What I stated was
>that I have had to route members of the same pair on differnet layers many
>times without adverse effects.  

Like I said before, we all cheat in our design, but calling it good practice
is another story. 
It's one thing to cheat and escape a differential pair out of the pin field
with different layers. It's another thing to extend it to say it is ok to
have no coupling between differential pairs and you can routing them anyway
you want in differential layers all the way.

>It is true that if you route one of them
>over a Vdd plane and the other over a ground plane, the noise on Vdd will
>couple onto one line and not the other, resulting in differential noise
>coupling.   That has to be guarded against.

Now we are talking sense here.

>As to my challenge that traces on outer layers casue EMI, I have seen two
>papers cited, one of which does not claim this, the other of which I have
>yet to receive a copy.

Call me cynical but I can't dig up a single paper Microsoft presented in any
conference or Journal explaining how it generate bugs in "Windose". Can I
then say "Windose" has no bugs ? You are asking for examples of bad design
and of course no company will do their dirty laundry with a public
conference paper or Journal. I have seem plenty of examples of microstrip
signals failing signal integrity and EMI without the proper reference plane
(not my design but desperate plea for help from other groups). They are
either fixed by correcting the reference plane, crazy decoupling caps, thin
core planes or sometimes brute force with metallic enclosure and EMI
gaskets. Do you really expect those engineers to publish a paper explaining
what a bad idea it is to improperly referencing single ended signals with
the wrong reference plane on the surface ? Most of them, if not fired by
their boss by then, will probably keep their head low and move on to another
design and vowing not to reference highspeed microstrip signals to the wrong
plane again.

>This is a good dialogue, if for no other reason than that proponents of
>particular design rules are being challenged to show their validity.

I think plenty of people have given real life hard earn experiences here,
most of us don't make a living on writing papers, we got paid to ship a
working product out the door and move on to the next one. Do I need a paper
to explain to me I have to slow down in the highway when I see a CHP ? No, I
have enough bad experiences to tell me I should.
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