[SI-LIST] Re: Traces don't cause EMI - really?
- From: phillip.r.wellington@xxxxxxxxxx
- To: MikonCons@xxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 22 Oct 2003 15:34:10 -0600
I think there are many of us who lived through these early PC days who can
substantiate Mike's (and many others) assertions that a good enclosure is
required to contain emissions from microstrips. My experiences (at another
company) was with motherboards, video cards and monitors (even back when VGA
Video cards had 6 oscillators on them), SCSI, and ethernet. We ran into the
same problem with vendor provided product and tried to find compliant
"hanger queen" devices to perform our FCC Class-B tests with. Enclosures
were always an EMC reliability problem.
Surface microstrips do radiate and their emissions need to be contained
either by planes or an enclosure. The emissions from microstrip traces fill
the enclosure looking for a return path. The image plane can't contain all
the EM field lines. The emissions couple to internal cabling, ungrounded
heatsinks, sub-assemblies, etc, and cause self compatibility and/or external
compatibility problems. This can also happen with internal cabling connected
to motherboards that do not have local decoupling to keep those emissions
off of the cables. They are essentially microstrips without a reference
plane nearby.
A low impedance return path must be provided for a PREFERRED return path for
those emissions inside the cabinet. If you don't provide it, currents split,
and they will surely find the return path that you least desire (Reset
circuits, Analog/RF circuitry, Power traces, etc). It may not be a failure
at the time of test, but degraded noise margins may lead to "spooky"
problems in adverse environments (Electro-magnetic, thermal, voltage margin
sensitivities, etc). Good Stripline (symmetrical and asymmetrical) design
solves many EMC problems. As with all designs, there are trade-offs based on
multiple pain thresholds.
Often, surface microstrips are a susceptibility path for ESD failures as
well.
This has been a good thread with a lot of good input from seasoned, very
talented people. Congratulations.
Ross Wellington
L-3 Communications CSW
-----Original Message-----
From: MikonCons@xxxxxxx [mailto:MikonCons@xxxxxxx]
Sent: Wednesday, October 22, 2003 12:59 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Traces don't cause EMI - really?
In a message dated 10/20/2003 6:02:12 PM Pacific Standard Time,
chris.cheng@xxxxxxxxxxxx writes:
To hide behind claims that since PC's or workstations have surface trace
passing EMI and magically deduced that traces does not cause EMI problem
makes as much sense as driving in the highway seeing no cops pulling people
over for speeding and extending that to no one is speeding in the highway.
I love this analogy. Excellent comment, Chris.
Jeff Loyer stated the following.
" I don't believe a case of "well behaved" microstrip traces generating
enough EMI to fail FCC standards has been demonstrated - all failing
instances seem
to be accompanied with the caveat of including a design error, or
unreasonable geometries (.062" above the ground plane)."
Absolutely not true. Several papers over the past decade from respectable
sources (e.g., IBM, Ott, Paul, and me, sorry--don't want to sound arrogant)
have
demonstrated FCC Class B failure for boards that are NOT shielded by an
appropriately designed enclosure. Following is another personal experience
that
should put this contention to rest.
At the time of launch of the AMD K6 microprosser, I supported AMD with EMI
evaluations that required testing of multiple vendor PCs. I performed
analyses,
near-field probe tests, and microprocessor package measurements that
predicted
not only emission levels, but CPU package resonances that would aggravate
the
expected emissions. We tested about 10 separate PCs from vendors that
included Acer, HP, Dell, Compaq, and others. Tests were conducted at two
different
certified facilities (one in Santa Clara, CA and another in Dallas, TX). The
PCI
bus at that time was only 33 MHz, and the the microprocessor (typically
100-300 MHZ clocks) technology used was predominately 0.25 microns or larger
(which
inherently produces slower edge rates than todays 0.09 to 0.18 micron
technology). Nevertheless, ALL VENDOR PCs FAILED EMI WHEN THE CASES WERE
OPEN---MISERABLY. The resonances I had predicted were confirmed to contain
the worst
offending frequencies. In the same time frame, I consulted to Motorola on
their
Power PC motherboards, with the exact same result---you had better have a
good
enclosure to pass FCC (or CISPR) Class B levels. Shipping PCs from Phoenix,
AZ
to Europe loosened marginally designed case sufficiently to cause EMI test
failures in Europe that passed fine in the US. The cases were redesigned to
increase seam contact ruggedness to resolve the problem.
BOTTOM LINE: It is pure folly to mislead todays junior designers with
thoughts of successful EMI performance unless an adequate shielded enclosure
is doing
an excellent job of suppressing emissions generated directly from the
motherboards. Multiple, objective tests of products from the largest PC
suppliers
have unquestionably confirmed this fact. And, it IS possible to analytically
predict emission levels and their consequences (i.e., failure to pass
regulatory
requirements). Do your own analyses with the appropriate software, than
confirm
your results and your analytical techniques by radiated emission tests. Only
then will you have adequate confidence in how to execute a "works the first
time" design.
If my comments offend some, sorry; but I'm old and wise enough that I accept
reality, whether I like it or not (at $2800/day, my clients seem to think so
too).
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
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