[SI-LIST] Re: T-line resonant frequency
- From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
- To: forsilist@xxxxxxxxx
- Date: Tue, 27 Apr 2004 09:17:45 -0700
Raj
DDR memory devices load the transmission line. That loading includes,
package transmission line delays and capacitive loads at the ends of the
line, as a first approximation. These serve to lower the resonant
frequency of the bus.
regards,
scott
--
Scott McMorrow
Teraspeed Consulting Group LLC
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Teraspeed(SM) is the service mark of Teraspeed Consulting Group LLC
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raj singh wrote:
>Steve, sorry for such a 'to the point' question.
> I should have been more descriptive....
>I have a DDR data driver to be used in point-to-point
>source terminated(unterminated) enviorment. I am using
>spice simulation to find out for what T-line delay
>driver gives worst jitter, rest all are fixed (PRBS,
>pkg parasitics, clk freq, Z0=50 ...etc). I am
>simulating just one driver.
> I found that it is not Td=lambda,lambda/2,lambda/4
>which gives worst jitter, but values slightly less
>than this. WHY THIS? is what I want to clarify.
>
>Thanks
>Rjt
>
>--- raj singh <forsilist@xxxxxxxxx> wrote:
>
>
>>Hi all,
>>
>> What t-line delay (in terms clock period) will show
>>the worst driver jitter. Some papers, which i have
>>gone through, says it is when Td equals clock
>>period,
>>half the clock period or quarter the clock period
>>(calls it resonant frequency).
>> But cannot able to think of why is it so? Tried to
>>devolope some of my own ideas, but want to discuss
>>with the list to get correct answer.
>>
>>Thanks and regards,
>>Rjt
>>
>>
>>
>>
>>
>>
>>__________________________________
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--
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
Teraspeed(SM) is the service mark of Teraspeed Consulting Group LLC
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