[SI-LIST] The maximum length of a bus?

Good day gurus,

I have been asked a question,"What is the maximum length of RGMII interface 
that your chip can drive?"  We know that RGMII interface is a chip to chip bus, 
all the data synchronous to the clock of the driver. Rise time of clock is 
0.75ns(20%-80%). Both edges of the reference clocks drives data at 125MHz. 
Maximum length specified in the specification is 6 inches, but in some 
application cases bus length would be more than 6 inches.

How do I model/analysis the bus to find the answer?

Regards,


C.Y. Cheng
System design Engineer 
Realtek Semiconductor Inc.
 

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