[SI-LIST] Re: The Implications of Nonmonotonic Transitions

> ...  The datasheet setup time assumes
> a monotonic switching input.  <I have seen this in my I/O design
> experience.>

I am not aware that the datasheet requires actual non-monotonicity on inputs
when they are not being clocked.  Datasheets do assume some specified
risetime however; but any datasheet I've seed doesn't say anything about
what happens before that.

Obviously, for the setup time requirements, you need to use the last time
the input signal crosses the appropriate threshold and stays stable; anyone
would be a fool to use the first time.  From your question you already
understood this.  The other factor from the datasheet is signal risetime;
and if your non-monotonic signal has a significantly different risetime than
the one used for the datasheet specifications (assuming that they listed it
on the datasheet), there can sometimes be a second order effect on timing.

Of course, any clock-like signal, or one used in that way (an input that
triggers an action rather than being clocked in), usually needs to be
monotonic; but I'm sure you knew that already.

Non-monotonic, indeterminate, or very slow risetime signals outside of the
setup-hold window, can in theory cause increased input buffer current, power
dissipation, and the potential for on-chip oscillation.  However, I think
these are rarely if ever noticeable in modern logic.  Most input buffers are
small and the effects do not propagate very far.

If the signal can go non-monotonic, make sure that's the worst-case
situation and that it doesn't dip back below threshold again later, under
different conditions.  And take a good look at your crosstalk analysis and
possible EMI.

Andy

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