[SI-LIST] Re: TDR measurement

  • From: <Aubrey_Sparkman@xxxxxxxx>
  • To: <giuseppe.dabundo-univ@xxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 14 Apr 2006 11:16:52 -0500

Giuseppe,
Does your BGA Package have a metal "die paddle" or "flag" that is
floating?  A trick we did at a previous company was to wirebond all the
ground pads (and the signal pin of interest) to ground.  This method has
the added benefit of including some wirebond inductance in your signal
which is important.


Aubrey Sparkman=20
Enterprise Engineering Signal Integrity Team
Dell, Inc.=20
Aubrey_Sparkman@xxxxxxxx=20
(512) 723-3592

The Greatest Pleasure in Life is Doing what People say can't be done...

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Giuseppe DABUNDO
Sent: Friday, April 14, 2006 9:50 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] TDR measurement

Hi All,
I'm currently working to measure parasitics of a BGA Package's nets
(RLC)  by TDR measurements.My package is mounted on a board and i
performed two measure :a first one on a board with empty socket and the
second one with the package inside the socket.At the moment I have
measured only the value of capacitance using a method suggested in some
application notes of TDA Systems.

http://www2.tek.com/cmswpt/tidownload.lotr?ct=3DTI&cs=3DApplication+Note&=
ci=3D
3049&lc=3DEN&wt=3D480&wtwi=3D3049&wtla=3DEN&wtty=3DTI&wtsty=3DApplication=
+Note&wtpt=3D
DOWNLOAD&wtsize=3D866+KB&wtver=3D1.0&wtcat=3Dtektronix&wtnbrp=3D0&wtti=3D=
TDR+Techn
iques+for+Characterization+and+Modeling+of+Electronic+Packaging+

My problem is that i haven't a 'short' either at level board and inside
the package(it's a major problem because i can't connect wire bond to
ground);in other words i have all net open-ended.
I would like to know if another method to measure L and R without a
'short' reference  exists .

Thanks

                   Giuseppe
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