Hi All, I'm currently working to measure parasitics of a BGA Package's nets (RLC) by TDR measurements.My package is mounted on a board and i performed two measure :a first one on a board with empty socket and the second one with the package inside the socket.At the moment I have measured only the value of capacitance using a method suggested in some application notes of TDA Systems. http://www2.tek.com/cmswpt/tidownload.lotr?ct=TI&cs=Application+Note&ci=3049&lc=EN&wt=480&wtwi=3049&wtla=EN&wtty=TI&wtsty=Application+Note&wtpt=DOWNLOAD&wtsize=866+KB&wtver=1.0&wtcat=tektronix&wtnbrp=0&wtti=TDR+Techniques+for+Characterization+and+Modeling+of+Electronic+Packaging+ My problem is that i haven't a 'short' either at level board and inside the package(it's a major problem because i can't connect wire bond to ground);in other words i have all net open-ended. I would like to know if another method to measure L and R without a 'short' reference exists . Thanks Giuseppe ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu
