[SI-LIST] Switching FET Slew Rate

Hi All,
   
  I am curious to see if anyone has an opinion on the best way to slow down the 
slew rate of a FET in a switching power supply.  
   
  One way is to add a series termination resistor at the final output, but this 
would change the DC power level since it affects the DC drive stength.  
  A second way is to add some source resistance to the FET.  This seems to be 
effective.
   
  I'd love to hear others' opinions / experiences, if any?  This is intended to 
be an open question, not necessarily specific to any design.
   
  Thank you,
Joseph Aday
   



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