[SI-LIST] Re: Switch Mode PS Noise
- From: Ron Kinder <ron.kinder@xxxxxxxxxxxx>
- To: declan.hegarty@xxxxxxxxx
- Date: Mon, 23 Oct 2006 10:46:29 -0700 (PDT)
Declan,
Regarding cleaning up the probe response, often there are some ground
loop currents flowing down the shield of the probe when making this
type of measurement. It passes through the chassis of the scope and
flows down the safety earth or down other probe sheilds to what the
scope thinks is "ground". This "extra" current in the shield generates
a greater voltage drop on it than occurs on the center conductor,
which is typically driving a megohm. The goal is to have the current
in the shield exactly equal, but opposite sign of the current in the
center conductor. This can often be accomplished by passing the probe
through ferrite cores. The "real" probe signal currents don't see the
core impedance because the net magnetism from them is zero. The
"clamshell" EMI cores seem to work very well for this.
Regards,
Ron
>X-Original-To: si-list@xxxxxxxxxxxxx
>Delivered-To: si-list@xxxxxxxxxxxxx
>Date: Mon, 23 Oct 2006 07:14:24 -0700
>To: "Declan Hegarty" <declan.hegarty@xxxxxxxxx>
>From: steve weir <weirsi@xxxxxxxxxx>
>Subject: [SI-LIST] Re: Switch Mode PS Noise
>Cc: istvan.novak@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
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>Declan, if you fashion a probe with minimal loop area between the
>shield and the probe tip, you will minimize your noise pick-up. If
>you are using a probe with a ground clip attached to an inch or two
>of wire, you will have lots of pick-up.
>
>When the switcher runs it could be imparting noise on the input in a
>frequency range that the linear doesn't suppress. An additional item
>to check is comparison of the noise at the input with the output.
>
>Good luck.
>
>
>Steve.
>At 06:35 AM 10/23/2006, Declan Hegarty wrote:
>>Thanks very much for your input guys. I think I've confused things
>>with a poor description of my circuit. The switch-mode output here
is
>>not the input to the linear regulator. The IC I'm using, although
>>designed as a dual-ouput switch mode controller, also happens to
have
>>a small linear regulator controller built in, comprising a feedback
>>pin (to a fixed internal reference of 1V), and a base drive pin. So
>>electrically, the switch-mode and linear supplies should be
>>independent. The input bias for the pnp comes from a different
>>source,
>>
>>However (possibly due to poor component placement ) I believe the
>>linear regulator external transistor is picking up switching noise.
>>When I shut the switch-mode output down, the linear regulator works
>>just fine. When the switch-mode output is running, I can see
voltage
>>spikes on the base of the pnp, synchronous with the switching
>>frequency. I'm just trying to establish how much of this noise is
>>"real" and how much is spurious pickup by the probe.
>>
>>Regards,
>>Declan.
>>
>>On 10/23/06, steve weir <weirsi@xxxxxxxxxx> wrote:
>>>Declan, just to add a hopefully simple test to the suggestions
Istvan
>>>offered: break the connection from the switcher to the LDO, and
>>>source the LDO from a suitable bench supply. If the problem is
gross
>>>instability in the LDO loop, oscillations will still
>>>develop. Compensation is your friend.
>>>
>>>Good hunting.
>>>
>>>
>>>Steve.
>>>
>>>
>>>At 06:07 AM 10/23/2006, Istvan Novak wrote:
>>> >Hi Declan,
>>> >
>>> >If the LDO output is higher than the set point, the likely
problem is
>>> >self-oscillation,
>>> >especially that you use a PNP transistor in the LDO. The signal
you see
>>> >at the
>>> >base of the PNP transistor may appear to be related to the
switching
>>> >frequency
>>> >of the upstream converter, but unless you can see both waveforms
on the
>>> >same
>>> >scope screen, synchronized, I would first suspect the
self-oscillation
>>> >of the LDO.
>>> >
>>> >Suggestions:
>>> >- check the ripple at the output of DC-DC converter, which is the
input
>>> >of the
>>> >LDO. Supposedly you have buffer capacitors at that point, and
>>> the switching
>>> >ripple should be below 100mVpp. If bigger than 100mVpp, you need
more
>>> >capacitance or better capacitors at the point. If below 100mVpp:
>>> >- change the LDO, by adding a small series resistance (10-30
ohms) to the
>>> >base of the PNP transistor. This may already kill the
self-oscillation,
>>> >if in
>>> >fact that causes your problem
>>> >- if this is not enough, you can overcompensate the LDO
regulation loop.
>>> >If there is access to the feedback loop, try adding capacitors to
>>> reduce the
>>> >loop bandwidth (where and how much, depends on the LDO). You
can
>>> >also try adding capacitance (nF range) in parallel to the
base-collector of
>>> >the PNP transistor
>>> >- note also that LDO stability may be affected by the output load
and
>>> >output capacitance and any extra phase shift in the sense and
feedback
>>> >looop
>>> >
>>> >Once you know where the problem is coming from, we can think
about
>>> >fixing it.
>>> >
>>> >Regards,
>>> >
>>> >Istvan Novak
>>> >SUN Microsystems
>>> >
>>> >Declan Hegarty wrote:
>>> >
>>> > >Hi folks,
>>> > >
>>> > >I'm currently investigating a power supply circuit based on an
IC with
>>> > >two switch-mode outputs and a small linear regulator. The
linear
>>> > >regulator uses an external pnp transistor in a simple low
dropout,
>>> > >common emitter configuration, and is currently running out of
>>> > >regulation, with an average DC level of 2.39V instead of the
required
>>> > >1.8V.
>>> > >
>>> > >I believe that noise from one of the switcher outputs is
coupling into
>>> > >the base of this transistor, causing current pulses at the
output
>>> > >which are being averaged across the output capacitor to
increase the
>>> > >nominal DC level. When I shut down the offending switch mode
output,
>>> > >the linear regulator works properly. So to my question.......
>>> > >
>>> > >I'm using a fairly cheap and cheerful oscilloscope and probe.
When I
>>> > >probe the base of the pnp transistor, I see 600mV spikes
>>> > >time-correlated with the switch-mode transitions from 0-12V.
I'd like
>>> > >to understand how much of this noise is just pickup by the
probe
>>> > >leads, and how much is actually present on the base pin of the
pnp. I
>>> > >wondered if the following was a valid approach:
>>> > >
>>> > >1. Place the ground lead of the probe at a fixed ground point
on the
>>> > >PCB, near the area of interest.
>>> > >2. Probe a ground via as close to the pnp base as I can find.
>>> > >3. Observe the noise on this measurement.
>>> > >4. Now probe the pnp base.
>>> > >5. Observe the noise on this measurement. Subtract the noise
>>> > >observed in 3 to approximate the "real" coupled noise at the
pnp base.
>>> > >
>>> > >Clearly this isn't going to be high precision, I know. Any
other
>>> > >suggestions for an improved understanding of what's going on
here
>>> > >would be much appreciated.
>>> > >
>>> > >Thanks. D.
>>> > >
>>> > >
>>> >
>>>
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