[SI-LIST] Re: Spacing rules for reduction of cross talk

Hello All,
 The effect of cross-talk comes into picture when there is signal
interference between adjacent signal traces on the board.
So while calculating cross-talk the board designer should be more =
concerned
abt distance between adjacent pcb tracks (and not the track =
width)especially
the traces adjacent to high speed signal traces.

Hope this resolves the doubt.

Thanks and Regards,
Vijay.C
Product Engineer,Serial Link Ips.
CRnD,STMicroelectronics(Noida).

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of Kedar P. Apte
Sent: Thursday, January 06, 2005 1:18 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Spacing rules for reduction of cross talk


Hi All,
some rules of route to route spacing are mostly followed by high speed =
board
designers as=20
w, 2w, 3w where w is actual trace width and the spacing reduces for
syncronous signals=20
as like for data lines and address line the spacing will be kept equal =
to
the trace width  =3D w and for other async. signals it goes on =
increasing by
2w and 3w rule=20

but in the calculation of the cross talk trace width is not considered=20
why is it so..........?

please explain

thanks in advance

rgds
kedar
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