[SI-LIST] Re: Signal Integrity and PCB layout positions for Cisco R&D center in CHINA (Shanghai, China)

Any comment on SI engineer's salary range in China?

--- "Bill Chen (billchen)" <billchen@xxxxxxxxx> wrote:

> =20
> I have several SI and PCB layout  job openings at
> Cisco R&D Center in
> Shanghai, China.
> 
> If you  have the right background and are interested
> in the positions,
> please
>  email me your resume.
> 
>   Please keep in mind that these positions are
> located in Shanghai
> China.
> 
> 
> 
> =20
>  Thanks!
> =20
> Bill
> =20
> 
> ****************************** Job Description
> *************************************************
> 
> Electrical Engineer - Signal Integrity and High
> Speed Design
> 
> Location: Shanghai, China
> 
> Job Description:
> 
> As part of signal integrity and high speed design
> technology team,
> design and analyze high speed analog/digital
> circuits for networking
> products, with emphasis on high speed signal and
> power analysis
> (especially timing and noise) of ASICs and printed
> circuit boards.=20
>  Model/simulate/characterize high speed systems,
> including high speed
> I/Os, chip packages, printed circuit boards, and
> system interconnects.=20
> =20
>  Qualifications:
> 
> -Proficiency with spice (or equivalent) circuit
> simulation, 3D
> field-solver and time/frequency domain analysis
> -Experience with IBIS and SPICE simulation tools.
> Experience with
> SpecctraQuest , XTK, ADS, ICS and HSPICE a plus=20
> -Experience with 2D, 3D or High Frequency Field
> Solvers is required.=20
> -Familiarity  with high speed serdes design, PLL
> design  and LVDS,
> LVPECL, CML and other  high-performance I/O
> technologies.
> -ASIC design experience with  I/O selection and
> simulation/validation,
> and power noise analysis
> -Solid background on transmission line theory  are
> necessary
> -Experience correlating simulation results with lab 
> measurements using
> oscilloscopes, TDRs, VNAs, and spectrum analyzers is
> a plus.
> -Strong programming skill with Perl or other script
> language for process
> automation
> -Self motivation, teamwork and strong communication
> skills are essential
> -Typically requires MSEE/CS or higher combined with
> 3-5+ years of
> related experience, or  BSEE/CS combined with 5-7+
> yrs related
> experience.
> -Fluent English in speaking, reading and writing
> =20
> 
> 
> Electrical Engineer - PCB Layout and Design
> 
> Location: Shanghai, China
> 
> Job Description:
> 
> 
> As part of high speed PCB layout design team,
> responsible for high
> speed, high density printed circuit board  physical
> layout design for
> networking products. Work closely with PCB
> fabrication house and
> engineers from board design, signal integrity and
> manufacturing groups
> to perform new or cost reduction PCB boards. You
> will be responsible for
> all aspects of PCB layout tasks including parts
> placement, routing,
> verification, and creating final design outputs.=20
> 
> =20
> Qualifications:
> 
> -Minimum of 5 years experience working with Cadence
> Allegro tools.
> Concept schematic capture experience is a plus.
> -Proficiency with all aspects of PCB design
> -Strong experience in designing multi-layer, high
> density designs
> utilizing 16 to 24 layers with 1500 or more
> components.=20
> -Experience in high speed routing requirements.=20
> -Good knowledge of signal integrity requirement and
> noise / crosstalk
> prevention
> -Familiar with current industry Design for Test
> (DFT) and Design for
> Manufacturing (DFM) practices.
> -Experience in creating pad stacks and component
> geometries.
> -Basic knowledge of electronic manufacturing
> procedures and materials.
> -Self starter with strong organizational,
> communications and
> interpersonal skills, with the ability to work on
> short-cycle design
> projects.
> -Good interpersonal skill, ability to work
> effectively in a team
> environment.=20
> -Fluent English in speaking, reading and writing
>
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