[SI-LIST] Signal Integrity Opening with Force10 Networks
- From: "Peter Tomaszewski" <tomaz@xxxxxxxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 27 Mar 2006 14:11:23 -0800
Force10 Networks currently has a SI position open as described below.
If you are interested, please send your resume to me, Peter Tomaszewski
(tomaz@xxxxxxxxxxxxxxxxxxx).
To find out more about Force10 Networks, Inc. go to
www.force10networks.com
http://www.force10networks.com/
Member of Technical Staff - Hardware Engineering/Signal Integrity
Engineer - Milpitas, CA
Force10 Networks, Inc. is seeking a self-motivated individual that will
be responsible for defining, developing, and analyzing signaling
topologies for hi-speed digital interfaces. This person would be
responsible for pushing technology to the limits in designing 10Gbs and
beyond networking circuit boards.
Duties will include the following:
Modeling hi-speed I/O's, chip packages, printed circuit board
interconnects, and connectors with respect to parameters such as
reflections, crosstalk, ISI and designing to overcome these effects.
Perform both timing and clock distribution analysis and design.
Provide design constraints to PCB layout
Perform post route simulations for timing and signal quality.
Take and correlate lab measurements to simulations.
Troubleshoot interface issues.
Requirements:
BSEE degree with 5+ years experience in signal integrity analysis.
Strong foundation in transmission line theory.
Experience with spice simulation tools.
Experience with board simulation tools (Cadence Specctraquest
(preferred), Mentor Graphics Hyperlynx, ICX, XTK). Experience with 3D
modeling and model validation software is a plus.
Experience taking hi-speed laboratory measurements using the latest
oscilloscopes, Vector Network Analyzers, Spectrum Analyzers, Time Domain
Reflectometers and Bit Error Rate Testers.
Strong understanding of PCB layout principles. Ability to make
tradeoffs between mechanical, spatial, and electrical interface
requirements.
Experience in designing topologies for high speed memory interfaces
(GDDR, DDR, QDR).
Ability to work well with others in a team environment as well as
independently to setup printed circuit boards for simulation and lab
equipment for measurement.
Good debugging skills.
Excellent communication skills, both written and oral, as well as
exceptional design organizational skills.
Peter Tomaszewski 408-571-3564 - desk
Force10 Networks, Inc. 408-571-3660 - fax
1440 McCarthy Blvd.
Milpitas, CA 95035
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