[SI-LIST] Re: Series termination greater than the characteristic impedance?
- From: "Stephen Zinck" <signalintegrity@xxxxxxxxxxx>
- To: <aminotg@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 18 Jan 2006 20:41:15 -0500
Hello Gilles,
I think this is a very acceptable approach (when simulation proves it is OK
over process, voltage and temperature). Series terminations, as you know,
are most useful when placed at the source, with varying success as you move
the termination away from the source. In the midlevel series termination
case the resistor is placed (normally) in the middle of the trace, which
causes the effectiveness to be diminished (although the part count reduction
is a nice savings for tight layouts). This in-effectiveness can be remedied
by increasing the value of the mid-level series termination, sometimes above
the characteristic impedance of the transmission line. With your offset
mid-level termination, 60 ohms is probably a good value choice, given the
simulations I have done in the past. But the pitfall can be edge rate
degradation. For the mid-level series termination solution to be successful,
one must marry the combination of good signal integrity and with meeting the
slew-rate requirements of the interface for robust timing, especially if the
transmission line on one or both sides of the mid-level series termination
is long...
Cheers,
Steve
Stephen P. Zinck
Interconnect Engineering Inc.
P.O. Box 577
South Berwick, ME 03908
Phone - (207) 384-8280
Fax - (207) 676-8676
Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
Web - www.interconnectengineering.com
----- Original Message -----
From: "Gilles Aminot" <aminotg@xxxxxxx>
To: "steve weir" <weirsi@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, January 18, 2006 7:39 PM
Subject: [SI-LIST] Re: Series termination greater than the characteristic
impedance?
> Hi All,
>
> First, I'd like to thank everyone for their responses. I have more
> background information to add to this original post. After questioning
> this
> further here is what I found out.
>
> Before the pre-layout simulation was done, it was determined that space
> was
> a real constraint. So pre-layout simulation was done at 250MHz with a
> single
> series termination placed directly in the middle of the DDR2 and the CPU
> (1000mils on each side). This simulations yeilded good results (per the
> simulation), and these constraints were fed to the PCB design. Upon
> completion of the PCB design, it was found that the series terminations
> were
> placed closer to the CPU (~300-400mils). Post layout simulation showed
> excessive overshoot at the CPU during read cycles which isn't too
> surprising. In order to save the layout the 60ohms was recommended to save
> the day. According to the simulation this reduced the overshoot on read,
> but
> overdamped the signal during writes. Analysis still shows sufficient setup
> and hold, and overshoot tamed down a bit on a read.
>
> Is this an acceptable approach? I am still leaning toward seperate series
> terminations at each end of the databus as the real solution, but I am
> having difficulty justifying it to management since they see a report that
> says everything is OK.
>
> Kindest Regards,
> Gilles
>
>
>
>
> ----- Original Message -----
> From: "steve weir" <weirsi@xxxxxxxxxx>
> To: <aminotg@xxxxxxx>
> Sent: Tuesday, January 17, 2006 9:43 AM
> Subject: Re: [SI-LIST] Series termination greater than the characteristic
> impedance?
>
>
>> Gilles, that would not normally make sense. It sounds like you have
>> severe ringing problems and the series resistance was raised until they
>> were sufficiently calmed down. Between the resistor and the intrinsic
>> effective resistance of the driver the response will be heavily
>> overdamped. That is going to increase flight time and decrease margins.
>> If you can live with it, OK, but I would question that approach.
>>
>> Steve.
>> At 09:13 AM 1/17/2006 -0600, you wrote:
>>>Hi All,
>>>
>>>I was wondering if there is ever a case where a series termination should
>>>be higher than the characteristic impedance of a trace?
>>>
>>>We had an SI analisys performed on our DDR2 interface and the conclusion
>>>was to change the series terminations of our data bus to 60ohms. The
>>>characteristic impedance of the traces on our board is 50ohms.
>>>
>>>I always thought that a series termination was added to match the driver
>>>to the characteristic impedance of the trace, now I am confused, because
>>>the analysis on our board doesn't agree with this thinking.
>>>
>>>Kindest Regards,
>>>Gilles
>>>
>>>
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