[SI-LIST] Re: Sacrificial ground: Is it useful?
- From: MikonCons@xxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Sun, 26 Oct 2003 18:00:28 EST
John:
You were wondering about the source for chassis-grounded guard traces around
PCBs. I believe I'm the guilty party. Back in 1989, I devised a method to
protect board devices from ESD while reducing radiated emissions as well. I
generated the concept with the following guidelines.
Place a ring around the PCB periphery of 50 (or more) mils width on EVERY
layer. The outter layers should have a soldermask setback (i.e.,to expose the
conductor). Use stagger-spaced vias to connect all rings, forming a low
inductance conducting strap around the PCB periphery. The ring structure should
be
connected to the primary signal reference entry point (generally at a connector
interface).
The guard ring concept has multiple purposes:
a) Providing a field termination point for radiated emissions originating on
the PCB.
b) Providing a sacrificial/preferred ESD strike area with a current
distribution mechanism.
Item (a) is most beneficial where common-mode excitation exists on the planes
(e.g., in the case of planar resonances) of the PCB, but also serves to
intercept signals from the many inadvertent loop and monopole antennas that are
unavoidably formed in most any PCB layout. The ring provides the preferred path
back to the local ground reference for the PCB. Hence, the ring provides a
local termination and return path for any fields emanating from the PCB
circuits
and power/ground plane edges.
Item (b), by virtue of an exposed conductive structure, presents the most
likely strike area for any ESD buildup. The low inductance of the parallelled
layer structure minimizes potential differences around the PCB. If a strike
occurs, the charge is quickly distributed around the PCB and is fed into the
PCB
interior via the primary reference ground connection and appears as common-mode
voltage to the PCB circuits. Theh result is minimal disturbance (under the
circumstances
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