[SI-LIST] Re: Sacrificial ground: Is it useful?

  • From: steve weir <weirsp@xxxxxxxxxx>
  • To: coupswork@xxxxxxxxxxxxx,"si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 24 Oct 2003 16:42:47 -0700

John,

The idea of a guard ring in that case is to redirect an ESD strike current 
impulse through the chassis to the greatest extent possible, to avoid 
propagation of a damaging CM voltage through any of the planes or signal 
connections due to the extraordinary di/dt of the ESD event.  Guard rings 
work to the extent that they carry the ESD current to the chassis for 
dissipation without the di/dt causing either a voltage breakdown, or direct 
induction into a victim signal.

Capacitors sound like a really bad idea.  They create lots of opportunities 
for normal mode wave fronts, and their own ESL makes them subject to short 
circuit failures following events.  If you require chassis / signal ground 
isolation ( less common these days ), then you could be setting yourself up 
for a major safety hazard.   If you don't require the isolation, then the 
capacitors just add cost, and unwanted normal mode paths.

In my experience, guard rings are usually implemented as surface, chassis 
ground only, traces connected to faceplates, and usually signal ground at 
that point.  When an ESD strike occurs these traces can see big voltage 
spikes build over their inductance.  The separation from other traces is 
usually more a matter of what you can afford, than what you would 
prefer.  .050" wide centered .050" from the board edge ( mfg rule ) and 
.050" separation have been minimums that have served me pretty well. But 
beware the evil of rules of thumb.  When given the chance, I increase the 
separation.

Regards,


Steve.


At 09:58 AM 10/24/2003 -0700, John Coupland wrote:
>Hi gurus,
>We've traditionally used a "sacrificial ground" (a
>trace around the edge of PCBs) which is connected to
>chassis ground (when the board is installed). We also
>distribute some caps (like 0.1uF) from this trace to
>signal ground around the edge of the PCB.
>1. Is this trace used to help protect the active
>circuitry when one picks up the board by the edges
>(i.e. when ESD handling procedures are not being
>followed) OR is it beneficial for some other purpose?
>If beneficial:
>2. Are the caps beneficial or counter-productive?
>3. Should it be placed on all layers?
>4. How wide should it be?
>5. How near the edge it should be?
>6. How much spacing should there be from it to active
>traces? To power/ground planes?
>Thanks,
>John
>PS, I didn't see anything about it in the archives.
>
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