[SI-LIST] Re: SPICE inaccuracies (was Re: SI models at MGH speeds)

There is an interesting article by Dr. Richard Elco that provides the 
theory behind a Universal SPICE model that the SI community may find 
educational and informative.

http://www.highfrequencyelectronics.com/Archives/Nov02/HFE1102_Elco.pdf

Best regards.

Nicklas

Yu Liu wrote:

>Arpad,
>
>Personally, I view SPICE as a nonlinear, time variant, ordinary 
>differential equation
>solver. The techniques used in SPICE are mainly numerical integration 
>(to discretize the
>time variable), and numerical iteration (to linearize nonlinear 
>devices). Thus, from a
>solver point of view, the inaccuracies could come from tolerance setting 
>(how tight
>you want to set a convergence criteria during iteration), and time point 
>selection (how
>small you want to choose a time step to catch the changing waveforms). 
>Fortunately,
>in most SPICE tools, the above two are normally set automatically so 
>that users don't
>need to worry them too much (there are also quite some SPICE books 
>discussing these
>techniques and how to tune them).
>
>Of course, SPICE comes with built-in semiconductor device models (diode, 
>bjt, mosfet, etc).
>It seems this is the major inaccuracy source we are focusing on. 
>Strictly speaking, a semiconductor
>device is governed by Poisson's equation and continuity equation, which 
>are both partial
>differential equations. How to incorporate these equations into SPICE is 
>a formidable task: not
>only you need to keep the basic physical behavior of the model, but also 
>simplify the model significantly
>so that it can be evaluated efficiently. To achieve this conflicting 
>goal, many heuristics are developed
>and employed to make the model valid across a wide range of technologies 
>and geometries. There are
>many good examples of such model development, the BSIM1-4 model family 
>is a good case.
>
>Even after a set of model equations has been developed and verified, it 
>is not over - you need to
>characterize the model to fit into a specific technology, the process of 
>model parameter extraction.
>Nowadays a device model can easily have over 100 model parameters, how 
>to extract them deserves
>a separate topic.
>
>
>
>Muranyi, Arpad wrote:
>
>  
>
>>Hassan,
>>
>>There may be several reasons for inaccuracies in SPICE.
>>
>>1)  Bad process file.  Many times the process files are developed
>>   for the smallest transistor size, and at other sizes (such as
>>   in the larger I/O buffers) they are all over the place.
>>
>>    
>>
>Not a single set of model equations can fit all technologies. Likewise, 
>not a single set of model parameters
>can fit all device sizes. That's why a model binning is necessary. 
>Nowadays, almost all foundries distribute
>their device models in binning. It is a surprise to see people use one 
>set of model parameters for all device sizes.
>
>  
>
>>2)  Larger companies have their own proprietary SPICE tools,
>>   which usually have process parameters which are incompatible
>>   with commercial tools.  Converting these process files to
>>   something that commercial tools can do results in loss of
>>   accuracy.  Kind of like if you wanted to convert a level=3D13
>>   MOSFET model to level=3D3.
>>
>>    
>>
>It is not a good idea to convert one model to another. It could be true 
>that a proprietary
>model may better fit to its own technology. But if it can not be used to 
>the pulic (especially
>to its customers), the accuracy advantage can not be fully utilized.
>
>  
>
>>3)  I also hear a lot lately that the small geometries we are
>>   using these days are starting to push the SPICE equations
>>   to the edge where they are not all that accurate or valid
>>   any more.
>>
>>    
>>
>I agree, developing model is an on-going effort to take more physical 
>effects (gate tunneling,
>carrier velocity overshoot, to name a few) when the geometry further 
>shinks. Comparing
>to the old models 10-20 years ago, the latest device model can fit 
>today's dominant
>technology amazingly well.
>
>  
>
>>4)  For various reasons vendors release reduced "equivalent"
>>   circuits to the customer, which is not as accurate as the
>>   full design.
>>
>>    
>>
>Developing a useful model is a delicate balance in generality, accuracy, 
>complexity, and efficiency,
>and demands intimate knowledge of semiconductor physics, process, 
>circuits, and simulation techniques.
>No matter what format it uses (C, IBIS, AMS), a good model always 
>requires lots of effort and
>dedication (and lots of resources).
>
>
>Best regards,
>
>Yu
>==
>
>  
>
>>There may be more, but I could only remember these right now...
>>
>>Arpad
>>-----------------------------------------------------------------
>>
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
>>On Behalf Of Hassan O. Ali
>>Sent: Thursday, May 26, 2005 2:17 PM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: SI models at MGH speeds
>>
>>
>>On May 26, "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx> wrote:
>>
>>    
>>
>>>=20
>>>On the other hand, the reason people turn to encrypted SPICE
>>>models is simply because they do not have the time (or don't
>>>want to take the time) to figure out how to make behavioral
>>>models.  If IBIS models were hard enough to make, writing
>>>macro models and *-AMS models are even harder.  However,
>>>SPICE may not be the solution either.  For one, it is slow,
>>>but I also hear issues with its accuracy (contrary to the
>>>popular belief that it is accurate).
>>>
>>>      
>>>
>>Arpad,
>>
>>What did you hear about the source of SPICE errors? Are the errors due =
>>to the failure of=20
>>SPICE to accurately handle multi-GHz SPICE device models or something =
>>else?
>>
>>Thanks.
>>
>>Hassan.
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>>    
>>
>
>
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