[SI-LIST] Re: [SI-LIST]the palcement of bypass/decoupling capacitors
- From: "istvan novak" <istvan.novak@xxxxxxxxxxxxxxxx>
- To: <luhaizhao@xxxxxxxxxx>
- Date: Sun, 19 Jan 2003 11:36:51 -0500
Hi,
Similar questions have come up a few times in the past, you can
search the si-list archive (pointer is at the bottom of each posting)
for previous opinions.
The 'range of bypass capacitor' is one of the popular views in
power distribution design, and it is based on the time of flight
between the capacitor and the device it is supposed to serve.
This model views the bypass capacitor as a temporary
storage of charge on its way from the DC source to its final
destination. This model, when connected to the series resonance
frequency of capacitors, also implies and suggests that capacitive
impedance is 'good' in power distribution, while inductive
impedance is 'bad'.
While the elements of this model and view may all be correct,
I would not apply them in general to power distribution designs.
The device, which we want to power, does not care for the
time of flight of the charge, and it is equally happy if the charge
comes from inductance, capacitance or resistance. In fact,
most well-designed power distribution networks will provide
neither capacitive nor inductive, but mostly resistive impedance
over a wide range of frequencies.
The two extreme possibilities of power distribution designs are
(and a wide range of mix in between) either putting almost all
components of the network very close to the desitination, or
using grids or planes to feed devices, while bypass capacitors
are remotely located. We have the first option when we use
very small shapes around the package, or possibly put bypass
capacitors on the back side of the board under the package,
with no or minimal horizontal connections. In this
case the 'effective radius' of capacitor does not matter. We may
need the second solution when we cannot (or for some other
reason we dont want to) put bypass capacitors very close to
package pins. This kind of design usually has paired-up power
ground planes and the bypass capacitors can be placed further away.
Any time when we go through horizontal connections to feed a
package, the characteristic impedance of the trace (for low-current
applications) or the characteristic impedance of the planes (for
high-power applications) should approximately equal the impedance
the device needs. The traces or planes are transmission lines, we
have to match (terminate) them to get an impedance which will not
wildly fluctuate with frequency. As long as the matching is
achieved, it does not matter how far we have the capacitors from
the package. If we do not have proper matching, the impedance
gradiant may be huge over very short distances, even within what
we otherwise may call the 'effective radius' of the capacitor. Such
designs still may work OK, but it takes a lot of simulation to make
sure that it is acceptable under all circumstances.
In summary, when we try to put capacitors as close to the pins as
possible, this means that we know that the horizontal plane/trace
connections would be too inductive. The tradeoff is that you can
place bypass capacitors remotely when the horizontal inductance
is low enough, which usually means thin dielectrics, which come
at a higher price. If we do this properly, the location of bypass
capacitors matters much less and the 'service area' of the bypass
capacitor is mostly irrelevant.
I hope this helps.
Regards,
Istvan Novak
SUN Microsystems
----- Original Message -----
From: "lu Haizhao" <luhaizhao@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Friday, January 17, 2003 9:51 PM
Subject: [SI-LIST] [SI-LIST]the palcement of bypass/decoupling capacitors
>
> Hi,all,
> I am confusing about the placement of the bypass/decoupling
> capacitors.Xilinx inc has an application note with the name 'Power
> Distribution System (PDS) Design:Using Bypass/Decoupling Capacitors'.you
> can find it from website: http://www.xilinx.com/xapp/xapp623.pdf. In the
> page 8 we can find the content about the capacitors palcement,it has a
> example that a capacitor whose effective frequency is 125.8 MHz can
> place 1.53 inches(3.8cm) away from the ICs power pin .
> In other notes,conclusion is that the high frequency bapass
> capacitors shoulb be placed as close as posiible to the IC.The reason is
> to get the lowest inductance.
> If anynoe have studied about it?Can you tell which one above is the
> truth?
>
> Lu Haizhao
>
> Shenzhen,China
>
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