[SI-LIST] Re: [SI-LIST]: Design a shielded differential line
- From: "john lipsius" <johnlipsius@xxxxxxxxx>
- To: "si-list" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 28 May 2002 17:09:45 -0700
1. I would use a field solver, like Apsim RLGC or Ansoft.
2. I would not use broadside, as you show. I would use edge-coupled, instead,
due
to manufacturing problems (difficult to maintain the geometry, therefore
the Z).
3. Reference: "Transmission Line Design Handbook", Brian Wadell. See
sec. 4.6.
4. A shielded pair would have contiguous reference copper around all 4
sides. Your diagram doesn't show this.
5. Not sure why you specify "minimum capacitance between the differential line
and the ground" since that's fairly well set by your choice of FR4 and W,
unless you're doing something exotic like minimizing electrical length or
maximizing phase velocity, which aren't of concern, I believe, in normal
digital interconnect.
----- Original Message -----
From: "PRIEUR, Olivier" <Olivier.PRIEUR@xxxxxxxxxxxxxxxxx>
To: "si-list" <si-list@xxxxxxxxxxxxx>
Sent: Tuesday, May 28, 2002 7:15 AM
Subject: [SI-LIST] [SI-LIST]: Design a shielded differential line
>
> Dear All,
>
> I want to design a shielded differential line in a PCB.
> Nominal characteristic impedance of the differential line is 70 to 85 ohms
> The recherched struture is
> ______________ GND
> ___ h1
> ___ h
> ______________ h1 GND
> I have the added constraints:
> minimum width W of trace is .216 mm
> thickness h, h1 of dielectric is 0.1/0.2/0.3/0.4/0.5
> substrate dielectric constant about 4.7 (FR4)
> I look for h, h1 and W.
> I want a minimum capacitance between the differential line and the ground.
> Do you know a formula, an article about this topic?
>
> Best regards,
>
> ------------------------------------
> Olivier PRIEUR
> e-mail: olivier.prieur @astrium-space.com
> ------------------------------------
>
>
>
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- From: PRIEUR, Olivier