[SI-LIST] Re: SI Position Open READ THIS!!!!

  • From: Bo <bo_pfc@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Fri, 15 Jun 2001 18:45:10 -0700 (PDT)

Hi Esther,

I am not sure if you are aware but Signal Integrity did show up until 94-95. 
The only person to satisfy your requirements is Howard Johnson aka author of
first book on SI "Book of Black Magic".  What I am trying to say is that your
post will make some people laugh.  Don't worry you are not the first one with
similar post.  What you should have wrought is "8 years of high speed PCB board
design with emphasis on signal integrity".  That would be more belivable.
The SI wasn't issue at lower speeds.  It has shown up in last few years as a
mayor issue.  I have been working on SI and I can tell you there aren't that
many people who really know SI.  You should look for a person who has designed
whole lot of backplanes and who has done SI simulations on their own (not
someone who got other people to do it for them).

I hope this helps you.  And I hope you find right person for the job.


Regards,
Bo

p.s. If you need help being more specific in your search feel free to contact
me.
p.p.s.  I am not looking for a job and I probably wouldn't fit your
qualifications.  I am just trying to help.

--- esther williams <estherw2000@xxxxxxxxx> wrote:
> 
> Hello - The following is a SI position at an Optical Data Networking start
> up.
> 
> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> 
> Title: Senior Signal Integrity Engineer
> 
> Location: Mountain View, CA
> 
> Job Description:
> 
> - Specify, simulate, design and analyze high speed interfaces for data
> networking systems.
> 
> - Verification of actual hardware and confirm the simulations results to
> guarantee integrity of all the high speed interfaces.
> 
> - Generate guide lines for board designers and layout designers for the high
> speed routing.
> 
> - Setup process to sign off layouts for PCB fabs.
> 
> Position Requirements:
> 
> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, PECL.
> 
> - Familiar with high speed bus interfaces.
> 
> - Knowledgeable with ASIC design flow and IO selection process.
> 
> - Extensive use of SPICE and IBIS to simulate signal integrity for the high
> speed board.
> 
> - Experience with QUAD like tools to sign off PCB layout designs.
> 
> - Multi-gigabit board design and EMI/EMC containment techniques.
> 
> - Defined impedance controlled PCB stack-ups and familiar with fabrication
> process and backplane designs.
> 
> - MSEE or PhD.
> 
> - 8 + year?s experience in signal integrity.
> 
> 
> 
> ---------------------------------
> Do You Yahoo!?
> Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> 
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> 
> List archives are viewable at:     //www.freelists.org/archives/si-list 
> Old list archives are viewable at: http://www.qsl.net/wb6tpu
>   
> 


__________________________________________________
Do You Yahoo!?
Spot the hottest trends in music, movies, and more.
http://buzz.yahoo.com/
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List archives are viewable at:     //www.freelists.org/archives/si-list 
Old list archives are viewable at: http://www.qsl.net/wb6tpu
  

Other related posts: