[SI-LIST] Re: SA12E Vil and Vih

  • From: Mike LaBonte <mike@xxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxxxxx
  • Date: Thu, 03 Jan 2002 14:42:55 -0500

Sorry, I meant HSTL buffers as used in IBM SA12E. The HSTL
spec is EIA/JESD8-6, which gives Vil(ac) = Vref-0.20 and
Vih(ac) = Vref+0.20 on page 3. But this is an Aug 1995 spec,
and I now think this is a case where a vendor is simply
guaranteeing tighter switching as Andrew suggests.

Mike

"D. C. Sessions" wrote:
> 
> On Friday 28 December 2001 07:08, mike@xxxxxxxxxxx wrote:
> # IBM specifies Vil and Vih for SA12E technology as 0.1V below and above the 
> reference voltage. But the JEDEC specification for the same uses 0.2V above 
> and below the reference. Any opinions on which values to use for worst case 
> timing analysis?
> 
> Mike, could you clarify the JEDEC spec in question?
> SA12E isn't to my knowledge a JEDEC specification.
> (JEDEC specs are JESD* )
> 
> --
> | The race is not always to the swift, nor the battle to the strong. |
> | Because the slow, feeble old codgers like me cheat.                |
> +--------------- D. C. Sessions <dcs@xxxxxxxxxxxxxxxx> --------------+
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