[SI-LIST] Re: Ringing in Return Loss data
- From: istvan Novak <Istvan.Novak@xxxxxxx>
- To: "'qazi'" <qazi@xxxxxxxxxx>
- Date: Mon, 25 Aug 2008 22:34:39 -0400
Qazi,
Just to clarify: if this is Return Loss and not Insertion Loss, the
periodic ripple (ringing) is inevitable.
Actually it is inevitable in both, just in Insertion Loss it is hardly
visible if the trace is close enough
to the reference impedance. Return Loss, on the other hand,
periodically drops to zero (minus
infinite on the dB scale), wherever the frequency corresponds to
multiples of half wavelength
over the trace length. At even multiples of quarter-wave resonance the
Return Loss reaches its
maximum. Unless the trace is completely ideal, we can not get a
frequency independent characteristic
impedance, so even if the trace's characteristic impedance is close to
the reference impedance, the
nulls at multiples of the half-wavelength resonance make the remaining
small mismatch very obvious.
The Insertion Loss, on the other hand, will 'flatten out' to the naked
eye if the characteristic impedance
comes to within a couple of percent of the reference impedance.
Regards,
Istvan Novak
SUN Microsystems
Jimmy wrote:
> As Steve stated, you have a mismatch somewhere in your routing. Suggest you
> look at layer changes and number of VIAs in each of the diff pair to see if
> both are the same. If they do change layers, check how that changes
> regarding your planes and there distance from them. Check the driver
> strength so see if these are being overdriven and you are having ring back
> from undershoot/overshoot. Lastly, if you can find nothing wrong question if
> all the input into the simulator is correct.
>
> Omega
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of qazi
> Sent: Monday, August 25, 2008 8:20 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Ringing in Return Loss data
>
> Gurus,
> I can explain ringings on a TDR data but can anyone tell me why I am seeing
> this on a Return Loss data for a layout that is geometrically correctly
> done?
> This is a simulation result based on a .brd file in allegro and I was
> wondering if I was doing something wrong here as far as modeling the device
> or the SMAs. This board uses Fr-4 and the traces are around 4.5 inches long
> diff pairs. I know the impedances are kept constant (same geometry)
> throughout the whole path and return path is ideal.
> Rgds,
> Qazi
>
>
>
>
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