[SI-LIST] Re: Resistors to use for DDR termination
- From: "Novak David (TTE)" <david.novak@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 12 Jul 2005 10:25:43 -0500
Overshoots are the biggest problem I have seen when running without any =
termination. This is not a problem with the DDR inputs due to the way =
they are spec'd. However, the memory controllers don't typically spec. =
the inputs in the same way. DDR is spec'd to handle ~1.5V overshoots =
while memory controllers are typically spec'd to handle only 300mV. Then =
the question becomes: Are the DDR inputs actually different from the =
inputs of the memory controllers or do the DDR simply have better specs?
I also expect jitter to be more of an issue without termination since =
the overshoots distort the waveforms.
David
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On Behalf Of Dimiter Popoff
Sent: Tuesday, July 12, 2005 9:47 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Resistors to use for DDR termination
thanks for the reply. Here is some more info:
I will actually be soldering two DDR chips (x16 each) as close as =
possible to the 5200 chip.
This is why I afforded at least the thoughts of no termination at all.
My termination voltage is designed conservatively enough, no problems =
expected there.
Simulating a DDR design at the conditions above sounds like a waste of =
time to me, and please don't go into suggesting more simulation, I am =
only looking for the right package/vendor/distributor of the resistors I =
have to use, I know the rest of the story.
Thanks,
Dimiter
------------------------------------------------------
Dimiter Popoff Transgalactic Instruments
http://www.tgi-sci.com
------------------------------------------------------
-------Original Message-------
> From: "Mike Greim" <mike.greim@xxxxxxxxxxx>
> Subject: [SI-LIST] Re: Resistors to use for DDR termination
> Sent: Jul 12 2005 17:16:26
>
> Hi Dimiter,
> =20
> Unfortunately the answer, as it almost always is, is it =
depends.=A0=A0
> How many dimms=3D20 you are supporting on the chanel, supported=20
> configurations, if the design is embedded, etc all impact the=20
> termination solution space.=A0=A0Simulation is really the =
answer.=A0=A0I=20
> would also take care in the design and decoupling of my VTT island as =
> I=3D20 have seen this be the source of channel failure on a number =
of=20
> designs.=A0=A0 You also need to figure out how much margin you are=20
> comfortable dealing with.=A0=A0 This will also impact the=3D20 =
various=20
> length matching requirements you have for the interface.
> Leverage your vendor and they may be able to give you an idea =20
> regarding your degrees of flexibility.=A0=A0They may even be able=3D20 =
to=20
> simulate a given topology to assess viability.
> =20
> Let me know if I can be of further assistance.=A0=A0I just =
finished=3D20 =20
> fixing one of these interfaces for someone who cut too many=3D20 =20
> corners.
> =20
> Best Regards,
> =20
> Michael Greim
> Platform Engineering
> Newisys, Inc.
> 512-340-9050, ext 232=A0=A0=A0=A0(V)
> 512-740-9097=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0(C)
> =20
> We will either find a way or make one=A0=A0=A0=A0 -Hannibal
> =20
> And all this science they don't understand is just my job six days a =
> week........
> =20
> The time is gone, the email's over
> Thought I'd something more to say.......
> =20
> =20
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx =3D
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dimiter Popoff
> Sent: Tuesday, July 12, 2005 8:41 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Resistors to use for DDR termination
> =20
> =20
> I am routing a board with an MPC5200 (freescale/mot) which has a DDR =
> interface (133 MHz clock). What sort of termination resistors =3D =20
> (resistor arrays?) do I put? Thera are just so many of them, I begin=20
> wondering how forgiving the 133 MHz interface is and could I get away =
> by just routing without any terminating restors at <2 inches trace=20
> length... I did that with SDRAM and it worked, now actually I won't=20
> be that daring, I cannot afford a failed board design, it's just the=20
> vast number of resistors =3D which brings these thoughts.
> Thanks in advance for the shared experience,
> =20
> Dimiter
> =20
> ------------------------------------------------------
> Dimiter Popoff=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 =
Transgalactic Instruments
> =20
> http://www.tgi-sci.com
> ------------------------------------------------------
> =20
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