Hello Fabrizio, I have a non-conventional solution that worked for me here with SSTL2 SSO noise. I will share it in case it is helpful to you. (It might not be). In this application, I replaced the standard SSTL2 termination scheme with a single 50 Ohm series resistor, and no parallel resistor, on all of the signals. This is except for the clock, which now has 33 Ohm series, and 100 Ohm parallel resistors, to increase its signal swing from what it was. All of these signals are point-to-point. These changes reduced the current flow for each signal transition enough to solve the SSO problems we were seeing. The termination mismatches, and slight timing delays caused, are not a problem for this case. But they might be a problem where traces are longer, or frequencies are higher. regards, Stephanie Stephanie Goedecke Philips - SP3D Chip Design GmbH Petersbrunnerstr.17 82319 Starnberg / Germany Phone: +49-8151-270-160 Fax : +49-8151-270-200 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu