[SI-LIST] Re: Reducing SSO noise in an FPGA
- From: "istvan novak" <istvan.novak@xxxxxxxxxxxxxxxx>
- To: <zhang_kun@xxxxxxxxxx>, <perry.qu@xxxxxxxxxxx>
- Date: Thu, 26 Jun 2003 23:11:11 -0400
Dear Zhangkun,
NPO capacitors may be useful if you have to target a smaller number of
specific frequencies. For wide-band solutions, at high frequencies, only
inductance (and loss) matters. And inductance is lower for non-NPO parts,
because you can get more capacitance in a smaller body, hence inductance is
lower. This does not mean that one cannot create a working solution with
NPO capacitors, just for the same impedance profile, it takes more parts.
Best regards,
Istvan
----- Original Message -----
From: "Zhangkun" <zhang_kun@xxxxxxxxxx>
To: <perry.qu@xxxxxxxxxxx>
Cc: <fzanella@xxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Sent: Thursday, June 26, 2003 8:02 PM
Subject: [SI-LIST] Re: Reducing SSO noise in an FPGA
> Dear Perry
>
> I do not think 100nF(X7R) cap will be good beyond 100MHz. We have done
some measurement about decoupling. 100nF could be useful for 10MHz. When the
frequency is high, NPO should be used.
>
> Best Regards
> Zhangkun
>
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