[SI-LIST] RDRAM
- From: "Ched-Chang Chai" <ched_chang@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 23 Dec 2002 15:39:32 +0800
Dear all,
The loading effects of the RDRAM package and I/O circuit would
lower the impedance of the channel.
Thus the width of the trace near the RDRAM load must be reduced.
Can someone tell me how to determine the reduced trace width and how long
the reduced trace should be around those loaded points?
Thank you very much in advance.
--
Regards,
Chai
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