[SI-LIST] Re: Question regarding thermal layers
- From: Wyland <dcwyland@xxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 11 Aug 2003 11:12:11 -0700
Alan,
Because the thermal layer is typically connected mechanically to the
chassis frame as
a thermal heat path. This connection is primarily mechanical for heat
transfer, but it is
usually an electrical connection as well as a by product of the
mechanical design.
Chassis ground is not ( and shouldn't be) DC or low frequency electrical
ground.
For example, one of the first thermal "layers" I encountered was in the
old ROLM
military computers. These were intended as flight hardware, to operate
in the almost
nonexistent atmosphere of 50,000 feet and above. No fans or finned heat
sinks
need apply. The thermal "layer" consisted of a 0.050" aluminum plate on
top of the
PCB between the DIP packages and the board. It was drilled to allow the
leads of
the chips and other components to pass through. When the board was
plugged into
the chassis, a clamp along the bottom of the board connected the
aluminum plate
to another aluminum plate that led to the airframe. Heat from the IC's
passed to the
plate on the board and from there to the airframe as ultimate heat sink.
A reasonably thick copper layer of the PCB can make a good thermal layer by
conducting the heat from the IC's to wherever it will be dumped. If the
exit
point is the chassis, you have the old problem that the thermal layer is
connected
to chassis ground. So the thermal layer may make a good HF AC ground but
not a power layer.
Dave Wyland
Alan Hilton-Nickel wrote:
>Dennis,
>
>This is the second time in about a week that someone has suggested using
>"thermal" layers in addition to 'ground" layers. I responded to the last one
>suggesting they use the thermal layers as ground, but maybe I'm missing
>something. What is is it that makes you feel that a sheet of copper that you
>are using to conduct heat cannot also do the job of conducting current?
>
>Alan Hilton-Nickel
>NVIDIA Corp,
>Santa Clara, CA
>
>
>
>>-----Original Message-----
>>From: Dennis Tomlinson [mailto:det_werks@xxxxxxxxxxxxx]
>>Sent: Sunday, August 10, 2003 4:27 AM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Question regarding thermal layers
>>
>>
>>I am designing a conductin cooled module which will employ
>>thermal layers in the stackup and underfill on selected
>>devices. The thermal layers are DC isolated from circuit
>>ground. I am proposing the following stackup:
>>
>>1. Signal + Comps
>>
>>2. Thermal
>>
>>3. Ground
>>
>>4. Signal
>>
>>5. Signal
>>
>>6. Ground
>>
>>7. Signal + Area Fills (1.8V, +5V)
>>
>>8. Signal + Area Fills (-5V, 2.5V)
>>
>>9. Power (3.3V)
>>
>>10. Signal
>>
>>11. Signal
>>
>>12 Ground
>>
>>13. Thermal
>>
>>14 Signal + Comps
>>
>>My question is in regard to using the thermal layers as
>>signal returns. The dielectric between thermal and ground
>>layers is 5 mil core. I am contemplating the use of some
>>strategically placed bypass caps between thermal and ground
>>layers, as well as between thermal and 3.3V layers. Anyone
>>care to critique or comment on this plan? Would it make sense
>>to swap layers 9 (3.3V) and 12 (Ground)? Thanks in advance,
>>
>>Dennis Tomlinson
>>
>>
>>
>>
>>
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