[SI-LIST] Re: Question regarding current loop

• From: <steven.d.corey@xxxxxxxxxxxxxx>
• To: <si-list@xxxxxxxxxxxxx>
• Date: Thu, 27 Apr 2006 18:31:34 -0700

```Hi Larry -- this may seem like pure semantics, but I would disagree with
your characterization of circuit theory.  In my lexicon, circuit theory
describes system behavior in terms of what have traditionally been
called "circuit variables" (e.g., voltage, current, voltage waves, power
waves).  I suppose field theory could analogously describe system
behavior in terms of its "field variables" (e.g., E,H fields).
Basically, field variables are defined at points, and circuit variables
are defined at ports.

In this sense, circuit theory encompasses concepts such as multiport
scattering parameters -- they're just a transformed version of impedance
or admittance parameters, which actually were covered in EE101.  It also
includes delay between ports -- an example might be T-Line equations
relating circuit variables voltage and current (or even incident and
reflected voltage waves) at the ports of a T-Line network.  PEEC
modeling is an example of a method that maps field interactions into
circuit variables without loss of generality.

Clearly you can't assume that a signal trace is a single circuit node
with zero delay.  Nor would I advocate the charge-hose concept of a
posse of electrons running full tilt down a transmission line, climbing
down to the ground plane, and hot-footing it back home.  It's also been
pointed out in the past on this list that you can't expect to measure a
unique voltage between two points several wavelengths apart.  None of
these is an inherent shortcoming of circuit theory, but each is an
example of misapplication of circuit theory in a high-speed environment.

You definitely need to understand the fields and their interactions to
be able to build a reliable high-speed circuit that is a good neighbor
in the FCC sense.  You may even use a field solver to figure out the
port behavior of part of your circuit.  But at the end of the day you
have to present a certain voltage to the input port of your receiver,
complete with enough current to charge or discharge its input circuitry.
In other words, we're stuck with circuit theory...  Rather than
discarding it, I would say that we're actually learning better what it
is and how to use it for high-speed design.

-- Steve

------------------------------------------------------------------------
-
Steven D. Corey, Ph.D.
Principal Engineer
Tektronix - Enabling Innovation
=20
http://www.tdasystems.com
http://www.tektronix.com
=20
email: steven.corey@xxxxxxxxxxxxx
phone: (503) 627-6816
fax:   (503) 627-2260
------------------------------------------------------------------------
-
=20

>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx=20
>[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Larry Smith
>Sent: Thursday, April 27, 2006 12:24 PM
>To: scott@xxxxxxxxxxxxx; doug@xxxxxxxxxx
>Cc: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: Question regarding current loop
>
>Scott - Your recent post was really interesting, I enjoyed reading it.
>Thanks for taking the time to write it up.  I think that what we are
>discussing here is the field theory view of the world and the circuit
>theory view of the world. =3D20
>
>In circuit theory, Kirchhoff has given us laws that discuss loop
>voltages and branch currents (EE101).  There is no concept of time
>across a node.  With low speed signals, the near and far ends of traces
>are connected with copper and considered to be the same node. =20
>Simple RC
>time constants can be used to evaluate the time delay from driver to
>receiver.  (That is so 1980's...  S parameters need not apply.)  Never
>the less, these are the circuit theory concepts that we use in
>evaluating local circuits where there is not a significant=20
>time delay in
>the physical size of the circuit.
>
>The concepts in your post are based on field theory.  A trace is not a
>node but a transmission line delay element, or else a string of nodes
>separated by L's and C's with equations like v=3D3DL*di/dt and=20
>i=3D3DC*dv/dt =3D
>.
>Circuit theory still works but it is running out of gas and concepts
>break down.
>
>The dividing line between circuit theory and field theory is when the
>length of the trace becomes a significant portion of the rise time.  A
>good rule of thumb for this dividing line would allow the=20
>trace to be no
>longer than 1/3 of a rise time for data lines, 1/5 of a rise time for
>clock signals and 1/7 of a rise time for instrumentation.  That way the
>near end will have a chance to influence the far end 2, 3 and 4 times
>during the rise time respectively.  Using the relationships
>freq=3D3D0.35/t_rise and period=3D3D1/frequency, we find that a=20
>trace may be
>1/8.6, 1/14.3 and 1/20 of a wavelength for data, clocks and=20
>instruments,
>listed in order of increasing accuracy requirements. =3D20
>
>When the physical size of the circuit (trace length) becomes more than
>1/20th of a wavelength long, simple circuit theory (charge=20
>hose analogy)
>begins to break down and you must use field theory concepts to
>understand what is happening. =3D20
>
>It is kind of interesting that you can start with the concepts (1) that
>1/20th of a wavelength is where circuit size becomes important=20
>and (2) a
>trace becomes a transmission line when it is more than 1/7th of a rise
>time long and then work backwards to find that frequency content is
>0.35/t_rise.  It's just another interesting way of looking at this.
>
>Regards,
>Larry Smith
>Altera Corporation
>
>
>
>
>
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