[SI-LIST] QDR <=> Processor interface
- From: Indira Gazula <igazula@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 20 Jul 2005 18:49:50 +0100 (BST)
Hi All,
I have recently stepped into the world of SI and would appreciate any inputs on
my question:
I am working on the interface between a QDR-II SRAM and Processor (163 Hz
clock, 1.5V). The suggestions for this interface is that trace length should
not exceed ~3000mil. This particular interface has a shunt resistor of 50Ohm to
0.75V on the QDR side. Simulations suggest longer trace lengths give acceptable
performance for much longer trace lengths. Could anyone please explain why it
is suggested that trace lenght should be restricted to 3in, also how it would
be different if there is no shunt termination (is it required).
Thanks in advance for the help.
Best Regards,
Indira.
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