[SI-LIST] QDR <=> Processor interface

Hi All,

I have recently stepped into the world of SI and would appreciate any inputs on 
my question:

I am working on the interface between a QDR-II SRAM and Processor (163 Hz 
clock, 1.5V). The suggestions for this interface is that trace length should 
not exceed ~3000mil. This particular interface has a shunt resistor of 50Ohm to 
0.75V on the QDR side. Simulations suggest longer trace lengths give acceptable 
performance for much longer trace lengths. Could anyone please explain why it 
is suggested that trace lenght should be restricted to 3in, also how it would 
be different if there is no shunt termination (is it required). 

Thanks in advance for the help.

Best Regards,

Indira.

                
---------------------------------
 Free antispam, antivirus and 1GB to save all your messages
 Only in Yahoo! Mail: http://in.mail.yahoo.com

------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu

Other related posts: