[SI-LIST] Power plane/capacitor analysis - how do you model/approximate power plane

I am trying to do simple modeling of power system impedance.  Ignoring
POL/DC-DC (which are at very low end of frequency range - 10's KHz) my
approach has been to take all caps on board, figure out their ESL, ESR, plus
mounting inductance then calculate complex impedance of all of them in
parallel.  I also would figure out pwr/gnd plane capacitance and treat it as
an ideal cap.  This technique works well to maybe 100MHz range but when
impedance of power plane becomes more dominant (smallest of all) at higher
frequencies I think this technique is not very accurate.
With this method the question I am trying to answer most of the time is
"will this IC be OK" as trying to figure out interactions between multiple
ICs is impossible with such a simple model.  The only time interaction can
be modeled is when all IC's start drawing current simultaneously.

Here are my questions

   - First order approximation of pwr/gnd planes is an ideal cap with
   capacitance equal to total plane capacitance.  Next steps to consider are
      - Look at plane inductance - how do I figure that out and what portion
      of the plane do I use (see below)?  Assuming plane is a circle
or rectangle
      is good enough for this exercise.
      - For a given frequency - only a "portion" of the plane is actually
      seen by IC.  How do I figure out what portion?  Treat plane as
transmission
      line, figure out what wavelength is?  Or wavelength/20?
   - Similar question to above - how do I decide how many of total caps on
   the board are seen by IC for a given frequency?
   - In figuring out cap tuning - should I tune caps to filter plane OR
   filter the noise seen by IC's pins (ideally by the die - but those models
   are often not available).  For example - if I have IC on top, 800MHz
   switching frequency, caps on the bottom immediately below IC - sharing
   power/gnd vias, 100mils thick board, and power/gnd plane about 15 mils from
   bottom - 0201 100pF caps would be perfect filters for quieting down the
   power plane but if I want cap that would filter 800MHz at balls of IC - then
   I should use 10pF!

CAD software would certainly answer the question but at $50-100K for what
would do the job well we have not crossed that pain threshold yet.

Any insights or pointers to reading material are appreciated
Aleks


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