[SI-LIST] Re: Power Supply Distribution/Filtering/Decoupling Guide]

Ah, I got it. I forgot you have a $10,000 processor module and can afford
the hundreds of power and ground pins through the socket. There is a little
bit more cost constrain in other companies products so I guess they look a
little closer to get the minimum amount of pins they can get away with (both
from package and system cost). But what is interesting is there is less pins
on the other solution and yet because of the clean cut off at 100MHz, there
is also less demand for the thin core PCB inductance as a side effect. Makes
me wonder if you should rethink your packaging strategy. Hey, at least you
can't blame me for designing the package or the module anymore :-D.


-----Original Message-----
From: Larry Smith [mailto:Larry.Smith@xxxxxxx]
Sent: Thursday, January 15, 2004 11:16 AM
To: Chris.Cheng@xxxxxxxxxxxx
Cc: scott@xxxxxxxxxxxxx; silist
Subject: Re: [SI-LIST] Re: Power Supply
Distribution/Filtering/Decoupling Guide]


Chris - The socket, PCB vias, PCB power planes or the chip package may
dominate the mounting inductance, depending on the design geometries. 
In our case, we have many core power and ground pins in parallel.  In
fact, we have so many that the "vertical" inductance is swamped out by
the "horizontal" inductance from the perforated PCB power planes.  I
have made enough measurements and inductance extractions to be
convinced of this.  A design point with a different pin configuration
or socket type may generate a completely different answer.

Yes, at 1 to 100MHz, the power plane spreading inductance does
matter.  I cannot say too much (per the gag rule) but I have a PCB
that very nicely meets a target impedance of 0.4 mOhms from 300kHz up
to more than 10 MHz with a matrix of about 60 ceramic capacitors. 
When I measure this board from the center of the BGA pattern, the
perforated power plane inductance begins to dominate the PDS impedance
(as seen by the chip) at about 2 MHz.  Darn.  An enormous amount of
capacitance would have to be put on the package to compensate for this
inductance or else we will end up with a large impedance peak at
around 20MHz as seen by the chip power terminals.  The spreading
inductance of the perforated power planes is causing a lot of
trouble!  

This is a clear case where the design of the chip and package has
forced a lot of inductance into the PCB PDS.  This would not be such a
problem for a smaller chip that consumes less current and has a higher
target impedance, but it is for a big power hog processor.  

The package and chip must be designed in such a way that it is
possible for the PCB to supply current at sufficiently low impedance
up to the frequency where the packaged chip can take over.  I believe
the best way to do this is to calculate the target impedance for the
chip and design the chip, package and PCB with a clear understanding
of the frequency range where each component is responsible for meeting
the target impedance.  Then it is just a matter of pulling together
the technology at each level of assembly to meet the target
impedance.  At this point, it is more of a system cost optimization
problem than a technical problem.  Technology is available at each
level of assembly to handle the problem, but unfortunately, nobody
wants the capacitance or low inductance power planes in their back
yard...

regards,
Larry Smith
Sun Microsystems

Chris Cheng wrote:
> 
> Larry,
> I would argue the processor socket and not the PCB plane spreading
> inductance will be the dominant inductance that determines the dividing
line
> between the PCB and chip/package responsibility.
> It also brings back the original question I raise to Scott, at 1-100MHz at
> the system level, do these spreading inductance matters ? Especially for
the
> relatively smaller size chipset packages (as compared to a big processor
> module). Do you think that decoupling cap being placed 1/2 inch from the
> center really needs that extra thin core power/gnd plane pair inductance
to
> make a difference ?
> Chris
> 
> -----Original Message-----
> From: Larry Smith [mailto:Larry.Smith@xxxxxxx]
> Sent: Tuesday, January 13, 2004 3:02 PM
> To: scott@xxxxxxxxxxxxx
> Cc: silist
> Subject: [SI-LIST] Re: Power Supply Distribution/Filtering/Decouplin g
> Guide]
> A side note - the buried capacitance of the PCB power planes is not
> very important in this frequency range but the spreading inductance
> associated with the dielectric thickness is extremely important.  In
> many cases, it is the power plane spreading inductance that dominates
> the the mounting inductance for the chip/package, and therefor
> determines the chip/package resonant frequency (the dividing line
> between PCB and chip/package responsibility for the PDS).
> Perforations in the PCB power planes greatly exacerbate the situation.
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